PDF SX1208 Data sheet ( Hoja de datos )

Número de pieza	SX1208
Descripción	Low Power Integrated UHF Transceiver
Fabricantes	Semtech
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No Preview Available ! SX1208 WIRELESS, SENSING & TIMING SX1208 Transceiver Low Power Integrated UHF Transceiver DATASHEET RFIO VBAT1&2 VR_ANA VR_DIG Power Distribution System LNA  Single to Mixers Modulators Differential RC Oscillator GND VR_PA PA_BOOST PA0 Ramp & Control PA1&2 Tank Inductor Loop Filter Division by 2, 4 or 6 Frac-N PLL Synthesizer XO 32 MHz XTAL RSSI AFC GND RESET SPI RXTX DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 GENERAL DESCRIPTION The SX1208 is a highly integrated RF transceiver capable of operation from 290MHz to 510MHz, including the 315 and 434 MHz license-free ISM (Industry Scientific and Medical) frequency bands. Its highly integrated architecture allows for a minimum of external components whilst maintaining maximum design flexibility. All major RF communication parameters are programmable and most of them can be dynamically set. The SX1208 offers the unique advantage of programmable narrow-band and wide-band communication modes without the need to modify external components. The SX1208 is optimized for low power consumption while offering high RF output power and channelized operation. TrueRF™ technology enables a low- cost external component count (elimination of the SAW filter) whilst still satisfying ETSI and FCC regulations. APPLICATIONS  Automated Meter Reading  Wireless Sensor Networks  Home and Building Automation  Wireless Alarm and Security Systems  Industrial Monitoring and Control  Smoke detectors KEY PRODUCT FEATURES  High Sensitivity: down to -124 dBm at 600 bps  High Selectivity: 16-tap FIR Channel Filter  Bullet-proof front end: IIP3 = -18 dBm, IIP2 = +35 dBm, 80 dB Blocking Immunity, no Image Frequency response  Low current: Rx = 16 mA, 100nA register retention  Programmable Pout: -18 to +20 dBm in 1dB steps  Constant RF performance over voltage range of chip  FSK Bit rates up to 100 kbps  Fully integrated synthesizer with a resolution of 61 Hz  FSK, GFSK, MSK, GMSK and OOK modulations  Built-in Bit Synchronizer performing Clock Recovery  Incoming Sync Word Recognition  115 dB+ Dynamic Range RSSI  Automatic RF Sense with ultra-fast AFC  Packet engine with CRC, AES-128 and 66-byte FIFO  Built-in temperature sensor and Low Battery indicator ORDERING INFORMATION Part Number Package Delivery MOQ / Multiple MARKETS  Europe: EN 300-220-1  North America: FCC Part 15.249  Korean Narrow bands SX1208IMLTRT QFN24 Tape& Reel 3000 pieces  Pb-free, Halogen free, RoHS/WEEE compliant product  Temperature range: -40 to +85°C Rev. 1 - March 2015 ©2015 Semtech Corporation Page 1 www.semtech.com 1 page SX1208 WIRELESS, SENSING & TIMING Table of contents Section DATASHEET Page FIGURES Figure 1. Block Diagram ...................................................................................................................................................................... 8 Figure 2. Pin Diagram (not to scale) ................................................................................................................................................... 9 Figure 3. Marking Diagram .................................................................................................................................................................. 9 Figure 4. TCXO Connection .............................................................................................................................................................. 16 Figure 5. Transmitter Block Diagram ................................................................................................................................................ 19 Figure 6. Receiver Block Diagram .................................................................................................................................................... 23 Figure 7. AGC Thresholds Settings .................................................................................................................................................. 24 Figure 8. RSSI Dynamic Curve ......................................................................................................................................................... 28 Figure 9. Cordic Extraction ................................................................................................................................................................ 28 Figure 10. OOK Peak Demodulator Description ............................................................................................................................... 29 Figure 11. Floor Threshold Optimization ........................................................................................................................................... 30 Figure 12. Bit Synchronizer Description ............................................................................................................................................ 31 Figure 13. FEI Process ..................................................................................................................................................................... 32 Figure 14. Optimized AFC (AfcLowBetaOn=1) ................................................................................................................................. 33 Figure 15. Temperature Sensor Response ....................................................................................................................................... 34 Figure 16. Tx Startup, FSK and OOK ............................................................................................................................................... 37 Figure 17. Rx Startup - No AGC, no AFC ......................................................................................................................................... 38 Figure 18. Rx Startup - AGC, no AFC ............................................................................................................................................... 38 Figure 19. Rx Startup - AGC and AFC .............................................................................................................................................. 38 Figure 20. Listen Mode Sequence (no wanted signal is received) .................................................................................................... 40 Figure 21. Listen Mode Sequence (wanted signal is received) ......................................................................................................... 42 Figure 22. Auto Modes of Packet Handler ........................................................................................................................................ 43 Figure 23. SX1208 Data Processing Conceptual View ..................................................................................................................... 44 Figure 24. SPI Timing Diagram (single access) ................................................................................................................................ 45 Figure 25. FIFO and Shift Register (SR) ........................................................................................................................................... 46 Figure 26. FifoLevel IRQ Source Behavior ....................................................................................................................................... 47 Figure 27. Sync Word Recognition ................................................................................................................................................... 48 Figure 28. Continuous Mode Conceptual View ................................................................................................................................. 50 Figure 29. Tx Processing in Continuous Mode ................................................................................................................................. 50 Figure 30. Rx Processing in Continuous Mode ................................................................................................................................. 51 Figure 31. Packet Mode Conceptual View ........................................................................................................................................ 52 Figure 32. Fixed Length Packet Format ............................................................................................................................................ 53 Figure 33. Variable Length Packet Format ....................................................................................................................................... 53 Figure 34. Unlimited Length Packet Format ...................................................................................................................................... 54 Figure 35. CRC Implementation ........................................................................................................................................................ 60 Figure 36. Manchester Encoding/Decoding ...................................................................................................................................... 61 Figure 37. Data Whitening ................................................................................................................................................................ 61 Figure 38. POR Timing Diagram ....................................................................................................................................................... 79 Figure 39. Manual Reset Timing Diagram ........................................................................................................................................ 80 Figure 40. +13dBm Schematic .......................................................................................................................................................... 80 Figure 41. +17dBm Schematic .......................................................................................................................................................... 81 Figure 42. QFN 24 Package Outline Drawing and Land Pattern ...................................................................................................... 83 Figure 43. Tape & Reel Specification ................................................................................................................................................ 84 Rev. 1 - March 2015 ©2015 Semtech Corporation Page 5 www.semtech.com 5 Page SX1208 WIRELESS, SENSING & TIMING DATASHEET 2. Electrical Characteristics 2.1. ESD Notice The SX1208 is a high performance radio frequency device. It satisfies:  Class 2 of the JEDEC standard JESD22-A114-B (Human Body Model) on all pins.  Class IV of the JEDEC standard JESD22-C101C (Charged Device Model) on pins VR_ANA, VR_DIG, RFIO, PA_BOOST, VR_PA, Class III on all other pins. It should thus be handled with all the necessary ESD precautions to avoid any permanent damage. 2.2. Absolute Maximum Ratings Stresses above the values listed below may cause permanent device failure. Exposure to absolute maximum ratings for extended periods may affect device reliability. Table 2 Absolute Maximum Ratings Symbol VDDmr Tmr Tj Pmr DC_20dBm VSWR_20dBm Description Supply Voltage Temperature Junction temperature RF Input Level Duty Cycle of transmission at +20dBm output Maximum VSWR at antenna port Min Max Unit -0.5 3.9 V -55 +115 °C - +125 °C - +6 dBm - 1% - 3:1 - 2.3. Operating Range Table 3 Operating Range Symbol VDDop Top Clop ML Description Supply voltage Operational temperature range Load capacitance on digital ports RF Input Level Min Max Unit 2.4 3.6 V -40 +85 °C - 25 pF - 0 dBm Rev. 1 - March 2015 ©2015 Semtech Corporation Page 11 www.semtech.com 11 Page

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