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LTC1922-1 Schematic ( PDF Datasheet ) - Linear

Teilenummer LTC1922-1
Beschreibung Synchronous Phase ModEGZ12DCFulated Full-Bridge Controller
Hersteller Linear
Logo Linear Logo 




Gesamt 24 Seiten
LTC1922-1 Datasheet, Funktion
LTC1922-1
Synchronous Phase
Modulated Full-Bridge Controller
FEATURES
DESCRIPTIO
s Adaptive DirectSenseTM Zero Voltage Switching
s Integrated Synchronous Rectification Control for
Highest Efficiency
s Output Power Levels from 50W to Kilowatts
s Very Low Start-Up and Quiescent Currents
s Compatible with Voltage Mode and Current Mode
Topologies
s Programmable Slope Compensation
s Undervoltage Lockout Circuitry with 4.2V Hysteresis
and Integrated 10.3V Shunt Regulator
s Fixed Frequency Operation to 1MHz
s 50mA Outputs for Bridge Drive and Secondary Side
Synchronous Rectifiers
s Soft-Start, Cycle-by-Cycle Current Limiting and
Hiccup Mode Short-Circuit Protection
s 5V, 15mA Low Dropout Regulator
s 20-Pin PDIP and SSOP Packages
U
APPLICATIO S
s Telecommunications, Infrastructure Power Systems
s Distributed Power Architectures
s Server Power Supplies
s High Density Power Modules
The LTC®1922-1 phase shift PWM controller provides all
of the control and protection functions necessary to imple-
ment a high performance, zero voltage switched, phase
shift, full-bridge power converter with synchronous recti-
fication. The part is ideal for developing isolated, low
voltage, high current outputs from a high voltage input
source. The LTC1922-1 combines the benefits of the full-
bridge topology with fixed frequency, zero voltage switch-
ing operation (ZVS). Adaptive ZVS circuity controls the
turn-on signals for each MOSFET independent of internal
and external component tolerances for optimal perfor-
mance.
The LTC1922-1 also provides secondary side synchro-
nous rectifier control. The device uses peak current mode
control with programmable slope comp and leading edge
blanking.
The LTC1922-1 features extremely low operating and
start-up currents to simplify off-line start-up and bias
circuitry. The LTC1922-1 also includes a full range of
protection features and is available in 20-pin through hole
(N) and surface mount (G) packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
DirectSense is a trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
BIAS
SUPPLY
VIN
48V
LTC1922-1
VOUT
3.3V
ISOLATED
FEEDBACK
Efficiency
100
90
VIN = 48V
80
VIN = 36V
70
60
0
10 20 30
LOAD CURRENT (A)
40
1922 • TA01b
1922 TA01a
1






LTC1922-1 Datasheet, Funktion
LTC1922-1
PIN FUNCTIONS
SYNC (Pin 1): Synchronization Input/Output for the
Oscillator. Terminate SYNC with a 5.1k resistor to GND.
RAMP (Pin 2): Input to Phase Modulator Comparator. The
voltage on RAMP is internally level shifted by 400mV.
CS (Pin 3): Input to Current Limit Comparators, Output of
Slope Compensation Circuitry.
COMP (Pin 4): Error Amplifier Output, Input to Phase
Modulator.
RLEB (Pin 5): Timing Resistor for Leading Edge Blanking.
Use a 10k to 100k resistor to program from 40ns to 310ns
of leading edge blanking. A ±1% tolerance resistor is
recommended. Leading edge blanking may be defeated by
connecting RLEB to VREF.
FB (Pin 6): Error Amplifier Inverting Input. This is the
voltage feedback input for the LTC1922-1.
SS (Pin 7): Soft-Start/Restart Delay Circuitry Timing
Capacitor.
PDLY (Pin 8): Passive Leg Delay Circuit Input.
SBUS (Pin 9): Input (Bus) Voltage Sensing Input.
ADLY (Pin 10): Active Leg Delay Circuit Input.
VREF (Pin 11): 5V Reference Output. VREF is capable of
supplying up to 15mA to external circuitry. Bypass VREF
with a 1µF (minimum) ceramic capacitor to GND.
OUTF (Pin 12): 50mA Driver Output for Secondary Side
Current Doubler Synchronous Rectifier.
OUTE (Pin 13): 50mA Driver Output for Secondary Side
Current Doubler Synchronous Rectifier.
OUTD (Pin 14): 50mA Driver Output for Active Leg Low
Side.
VCC (Pin 15): Chip Power Supply Input, 10.3V Shunt
Regulator. Bypass VCC with a 0.1µF or larger ceramic
capacitor to GND.
OUTC (Pin 16): 50mA Driver Output for Active Leg High
Side.
OUTB (Pin 17): 50mA Driver Output for Passive Leg Low
Side.
OUTA (Pin 18): 50mA Driver Output for Passive Leg High
Side.
GND (Pin 19): All Voltages on the LTC1922-1 Are Referred
to GND.
CT (Pin 20): Timing Capacitor for Oscillator. Use ±5% or
better multilayer NPO ceramic for best results.
6

6 Page









LTC1922-1 pdf, datenblatt
LTC1922-1
U
OPERATIO
PDLY corresponding to several volts across the MOSFET,
the LTC1922-1 can “anticipate” a zero voltage VDS and
signal the external driver and switch to turn-on. The
amount of anticipation can be tailored for any application
by modifying the upper divider resistor(s). The LTC1922-1
DirectSense circuitry sources a trimmed current out of
PDLY and ADLY after a low to high level transition occurs.
This provides hysteresis and noise immunity for the PDLY
and ADLY circuitry, and sets the high to low threshold on
ADLY or PDLY to nearly the same level as the low to high
threshold, thereby making the upper and lower MOSFET
VDS switch points virtually identical, independent of VIN.
Example: VIN = 48V nominal (36V to 72V)
1. Set up SBUS: 1.5V is desired on SBUS with VIN = 48V.
Set divider current to 100µA.
R1 = 1.5V/100µA = 15k.
R2 = (48V – 1.5V)/100µA = 465k.
An optional small capacitor (0.001µF) can be added
across R1 to decouple noise from this input.
2. Set up ADLY and PDLY: 7V of “anticipation” are required
in this circuit to account for the delays of the external
MOSFET driver and gate drive components.
R3, R4 = 1k, sets a nominal 1.5mA in the divider
chain at the threshold.
R5, R6 = (48V – 7V – 1.5V)/1.5mA = 26.3k,
use (2) equal 13k segments.
Zero Delay Mode
The LTC1922-1 provides the flexibility through the SBUS
pin to disable the DirectSense delay circuitry. See Figure␣ 3
for details.
VREF
SBUS
ADLY
PDLY
1922 F03
Figure 3. Zero Delays
Powering the LTC1922-1
The LTC1922-1 utilizes an integrated VCC shunt regulator
to serve the dual purposes of limiting the voltage applied
to VCC as well as signaling that the chip’s bias voltage is
sufficient to begin switching operation (under voltage
lockout). With its typical 10.2V turn-on voltage and 4.2V
UVLO hysteresis, the LTC1922-1 is tolerant of loosely
regulated input sources such as an auxiliary transformer
winding. The VCC shunt is capable of sinking up to 25mA
of externally applied current. The UVLO turn-on and turn-
off thresholds are derived from an internally trimmed
reference making them extremely accurate. In addition,
the LTC1922-1 exhibits very low (145µA typ) start-up
current that allows the use of 1/8W to 1/4W trickle charge
start-up resistors.
The trickle charge resistor should be selected as follows:
RSTART(MAX) = VIN(MIN) – 10.7V/250µA
Adding a small safety margin and choosing standard
values yields:
APPLICATION
DC/DC
Off-Line
PFC Preregulator
VIN RANGE
36V to 72V
85V to 270VRMS
390VDC
RSTART
100k
430k
1.4M
VCC should be bypassed with a 0.1µF to 1µF multilayer
ceramic capacitor to decouple the fast transient currents
demanded by the output drivers and a bulk tantalum or
electrolytic capacitor to hold up the VCC supply before the
bootstrap winding, or an auxiliary regulator circuit takes
over.
CHOLDUP = (ICC + IDRIVE) • tDELAY/3.8V
(minimum UVLO hysteresis)
Regulated bias supplies as low as 7V can be utilized to
provide bias to the LTC1922-1. Refer to Figure 4 for
various bias supply configurations.
12V ±10%
1.5k
1N5226
3V
0.1µF
VIN
VBIAS < VUVLO
1N914 RSTART
+
0.1µF
CHOLD
VCC VCC
Figure 4. Bias Configurations
1922 F04
12

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