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PDF RJF0604JPD Data sheet ( Hoja de datos )

Número de pieza RJF0604JPD
Descripción Silicon N Channel MOS FET
Fabricantes Renesas 
Logotipo Renesas Logotipo



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Target Specifications Datasheet
RJF0604JPD
Silicon N Channel MOS FET Series
Power Switching
R07DS0583EJ0200
Rev.2.00
Apr 13, 2012
Description
This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in
over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of
high junction temperature like applying over power consumption, over current etc..
Features
Logic level operation (4 V Gate drive).
Built-in the over temperature shut-down circuit.
High endurance capability against to the short circuit.
Latch type shut down operation (need 0 voltage recovery).
Built-in the current limitation circuit.
Power supply voltage applies 12 V and 24 V.
AEC-Q101 Compliant
Outline
RENESAS Package code: PRSS0004ZD-C
(Package name: DPAK (S) )
4
1
2
3
G
Gate Resistor
Temperature
Sensing
Circuit
Latch
Circuit
Current
Limitation
Circuit
Gate
Shut-down
Circuit
D
1. Gate
2. Drain
3. Source
4. Drain
S
Absolute Maximum Ratings
Item
Symbol
Drain to source voltage
VDSS
Gate to source voltage
VGSS
Gate to source voltage
Drain current
VGSS
ID Note3
Body-drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
IDR
IAP Note 2
EAR Note 2
Pch Note 1
Channel temperature
Tch
Storage temperature
Tstg
Notes: 1. Value at Tc = 25C
2. Tch = 25C, Rg 50
3. It provides by the current limitation lower bound value.
Ratings
60
16
–2.5
5
5
4.7
94.7
30
150
–55 to +150
(Ta = 25°C)
Unit
V
V
V
A
A
A
mJ
W
C
C
R07DS0583EJ0200 Rev.2.00
Apr 13, 2012
Page 1 of 7

1 page




RJF0604JPD pdf
RJF0604JPD
Target Specifications
Gate to Source Voltage vs.
Shutdown Time of Load-Short Test
16
14
12
10 VDD = 16 V
8
6 24 V
4
2
0
100 μ
1m
10 m
100 m
Shutdown Time of Load-Short Test Pw (S)
Shutdown Case Temperature vs.
Gate to Source Voltage
200
180
160
140
120
ID = 0.5 A
100
0 2 4 6 8 10
Gate to Source Voltage VGS (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
1
D=1
Tc = 25°C
0.5
0.3
0.2
0.1 0.1
0.05
0.03 0.02
0.01
0.01
10 μ
100 μ
θch – c (t) = γ s (t) • θch – c
θch – c = 6.25°C/W, Tc = 25°C
PDM
D = PW
T
PW
T
1m
10 m
100 m
Pulse Width PW (S)
1
10
R07DS0583EJ0200 Rev.2.00
Apr 13, 2012
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