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PDF LTC2141-12 Data sheet ( Hoja de datos )
| Número de pieza | LTC2141-12 | |
| Descripción | Low Power Dual ADCs | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LTC2141-12 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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FEATURES
n 2-Channel Simultaneously Sampling ADC
n 70.8dB SNR
n 89dB SFDR
n Low Power: 92mW/65mW/48mW Total
46mW/33mW/24mW per Channel
n Single 1.8V Supply
n CMOS, DDR CMOS, or DDR LVDS Outputs
n Selectable Input Ranges: 1VP-P to 2VP-P
n 800MHz Full Power Bandwidth S/H
n Optional Data Output Randomizer
n Optional Clock Duty Cycle Stabilizer
n Shutdown and Nap Modes
n Serial SPI Port for Configuration
n 64-Pin (9mm × 9mm) QFN Package
APPLICATIONS
n Communications
n Cellular Base Stations
n Software Defined Radios
n Portable Medical Imaging
n Multi-Channel Data Acquisition
n Nondestructive Testing
Electrical Specifications Subject to Change
LTC2142-12/
LTC2141-12/LTC2140-12
12-Bit, 65Msps/
40Msps/25Msps Low Power
Dual ADCs
DESCRIPTION
The LTC®2142-12/LTC2141-12/LTC2140-12 are 2-channel
simultaneous sampling 12-bit A/D converters designed
for digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 70.8dB SNR and
89dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.08psRMS allows undersampling of IF frequencies with
excellent noise performance.
DC specs include ±0.3LSB INL (typ), ±0.1LSB DNL (typ)
and no missing codes over temperature. The transition
noise is 0.3LSBRMS.
The digital outputs can be either full rate CMOS, double
data rate CMOS, or double data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC+ and ENC– inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
1.8V
VDD
CH 1
ANALOG
INPUT
S/H
12-BIT
ADC CORE
CH 2
ANALOG
INPUT
65MHz
CLOCK
S/H
12-BIT
ADC CORE
CLOCK
CONTROL
GND
1.8V
OVDD
OUTPUT
DRIVERS
D1_11
•
•
•
D1_0
D2_11
•
•
•
D2_0
CMOS
OR
LVDS
OUTPUTS
OGND
21421012 TA01a
2-Tone FFT, fIN = 70MHz and 69MHz
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
10 20
FREQUENCY (MHz)
30
21821012 TA01b
21421012p
1
1 page  
LTC2142-12/
LTC2141-12/LTC2140-12
DYNAMIC ACCURACY The l denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C. AIN = –1dBFS. (Note 5)
LTC2142-12
LTC2141-12
LTC2140-12
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
SNR Signal-to-Noise Ratio
5MHz Input
30MHz Input
70MHz Input
140MHz Input
l TBD
70.8
70.8
70.7
70.5
70.5
TBD 70.5
70.4
70.2
71
TBD 71
70.9
70.7
dBFS
dBFS
dBFS
dBFS
SFDR
Spurious Free Dynamic Range 5MHz Input
2nd or 3rd Harmonic
30MHz Input
70MHz Input
140MHz Input
l TBD
89
89
88
84
89
TBD 89
88
84
89
TBD 89
88
84
dBFS
dBFS
dBFS
dBFS
Spurious Free Dynamic Range 5MHz Input
4th Harmonic or Higher
30MHz Input
70MHz Input
140MHz Input
l TBD
95
95
95
95
95
TBD 95
95
95
95
TBD 95
95
95
dBFS
dBFS
dBFS
dBFS
S/(N+D) Signal-to-Noise Plus
Distortion Ratio
5MHz Input
30MHz Input
70MHz Input
140MHz Input
l TBD
70.7
70.7
70.6
70.2
70.4
TBD 70.4
70.3
69.9
70.9
TBD 70.9
70.8
70.4
dBFS
dBFS
dBFS
dBFS
Crosstalk
10MHz Input
–110 –110 –110 dBc
INTERNAL REFERENCE CHARACTERISTICS The l denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5)
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VCM Output Voltage
VCM Output Temperature Drift
IOUT = 0
0.5 • VDD – 25mV
0.5 • VDD
±25
0.5 • VDD + 25mV
V
ppm/°C
VCM Output Resistance
VREF Output Voltage
VREF Output Temperature Drift
VREF Output Resistance
VREF Line Regulation
–600μA < IOUT < 1mA
IOUT = 0
–400μA < IOUT < 1mA
1.7V < VDD < 1.9V
1.225
4
1.250
±25
7
0.6
1.275
Ω
V
ppm/°C
Ω
mV/V
21421012p
5
5 Page 
LTC2142-12/
LTC2141-12/LTC2140-12
TYPICAL PERFORMANCE CHARACTERISTICS
LTC2142-12: Integral
Non-Linearity (INL)
1.0
0.8
0.6
0.4
0.2
0.0
0.2
–0.4
–0.6
–0.8
–1.0
0
1024
2048
3072
4096
OUTPUT CODE
21421012 G01
LTC2142-12: Differential
Non-Linearity (DNL)
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
1024
2048
3072
4096
OUTPUT CODE
21421012 G02
LTC2142-12: 64k Point FFT,
fIN = 30MHz, –1dBFS, 65Msps
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
10 20 30
FREQUENCY (MHz)
21421012 G04
LTC2142-12: 64k Point 2-Tone
FFT, fIN = 69MHz, 70MHz,
–7dBFS, 65Msps
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
10 20
FREQUENCY (MHz)
30
21421012 G07
LTC2142-12: 64k Point FFT,
fIN = 70MHz, –1dBFS, 65Msps
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
10 20 30
FREQUENCY (MHz)
21421012 G05
LTC2142-12: Shorted Input
Histogram
18000
16000
14000
12000
10000
8000
6000
4000
2000
0
2043
2044
2045
2046
2047
OUTPUT CODE
21421012 G08
LTC2142-12: 64k Point FFT, fIN =
5MHz, –1dBFS, 65Msps
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
10 20 30
FREQUENCY (MHz)
21421012 G03
LTC2142-12: 64k Point FFT,
fIN = 140MHz, –1dBFS, 65Msps
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
10 20 30
FREQUENCY (MHz)
21421012 G06
LTC2142-12: SNR vs Input
Frequency, –1dBFS, 65Msps,
2V Range
72
71 SINGLE-ENDED
ENCODE
70
DIFFERENTIAL
ENCODE
69
68
0
50 100 150 200 250 300
INPUT FREQUENCY (MHz)
21421012 G09
21421012p
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC2141-12.PDF ] | |
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