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8T49N012 Schematic ( PDF Datasheet ) - Integrated Device Technology

Teilenummer 8T49N012
Beschreibung LVPECL/LVCMOS Clock Generator
Hersteller Integrated Device Technology
Logo Integrated Device Technology Logo 




Gesamt 28 Seiten
8T49N012 Datasheet, Funktion
FemtoClock® NG Crystal-to-3.3V, 2.5V
LVPECL/LVCMOS Clock Generator with
Fanout Buffer
8T49N012
DATA SHEET
General Description
The 8T49N012 is a high performance Clock Generator with
selectable LVPECL or Single-ended outputs. The 8T49N012 can
generate selectable frequencies from a crystal or a single-ended
reference clock. The frequency is selected from the Frequency
Selection Table.
Excellent phase noise performance is maintained with IDT’s Fourth
Generation FemtoClock® NG PLL technology.
Pin Assignment
SE
VCC
XTAL_SEL
PS_SEL
VCCA
VEE
NA_DIV1
NA_DIV0
VCC_X
XTAL_OUT
XTAL_IN
VEE
CLK_IN
nOE_B
56 55 54 53 52 51 50 49 48 47 46 45 44 43
1 42
2 41
3 40
4 39
5 38
6 37
7
8T49N012
36
8 35
9 34
10 33
11 32
12 31
13 30
14 29
15 16 17 18 19 20 21 22 23 24 25 26 27 28
QC0
nQC0
QC1
nQC1
VCCO_C
QC2
nQC2
VEE
QC3
nQC3
QC4
nQC4
QC5
nQC5
Features
• Fourth Generation FemtoClock NG PLL technology
• Three differential output banks:
Bank A: selectable between four pairs of LVPECL or four pairs
of complementary LVCMOS/LVTTL outputs
Bank B: two pairs of LVPECL outputs
Bank C: six pairs of LVPECL outputs
• Selectable clock input or crystal input.
• Supports 25MHz fundamental crystal or 25MHz, 50MHz,
66.67MHz clock input
• Selectable 156.25MHz, 125MHz, 100MHz clock for Bank B and
Bank C outputs
• Selectable 156.25MHz, 125MHz, 100MHz, 250MHz, 312.5MHz,
50MHz, 25MHz, 62.5MHz or 78.125MHz for Bank A outputs
• PLL lock indication (LVCMOS output)
• RMS phase jitter at 156.25MHz (12kHz - 20MHz): 0.199ps (typical)
• Power supply modes:
Core / Output
3.3V / 3.3V
3.3V / 2.5V
2.5V / 2.5V
• -40°C to 85°C ambient operating temperature
• 56-Lead VFQFN
• Lead-free (RoHS 6) packaging
56-Lead VFQFN, 8.0mm x 8.0mm x 0.9mm
8T49N012 REVISION 1 08/21/14
1
©2014 Integrated Device Technology, Inc.






8T49N012 Datasheet, Funktion
8T49N012 DATA SHEET
Table 3H. Bank A Output Divider table
Input
Frequency (MHz)
PS_SEL
25 Low (default)
66.66667
Mid
50 High
FB_DIV
Low (default)
Mid
Low
NA_DIV [1:0]
Low, Low (default)
Low, High
High, Low
High, High
Low, Mid
High, Mid
Mid, Low
Mid, High
Mid, Mid
Low, Low (default)
Low, High
High, Low
High, High
Low, Mid
High, Mid
Mid, Low
Mid, High
Mid, Mid
Low, Low (default)
Low, High
High, Low
High, High
Low, Mid
High, Mid
Mid, Low
Mid, High
Mid, Mid
Bank A
Frequency (MHz)
125
156.25
312.5
100
25
50
250
62.5
78.125
125
156.25
312.5
100
25
50
250
62.5
78.125
125
156.25
312.5
100
25
50
250
62.5
78.125
FEMTOCLOCK® NG CRYSTAL-TO-3.3V, 2.5V LVPECL/LVCMOS
CLOCK GENERATOR
6
REVISION 1 08/21/14

6 Page









8T49N012 pdf, datenblatt
8T49N012 DATA SHEET
Parameter Measurement Information
2V
2V
VCC,
VCCO_X
VCCA
Ferrite
Bead
2V
2V
Ferrite
Bead
VCC
VCCO_X
VCCA
-1.3V+0.165V
3.3V Core/3.3V QAx_CMOS LVPECL Output Load
Test Circuit
2.8V±0.04V
2V
2.8V±0.04V
Ferrite
VCC Bead
VCCO_X
VCCA
SCOPE
Qx
nQx
VEE
-0.5V±0.125V
3.3V Core/2.5V QAx_CMOS LVPECL Output
Load Test Circuit
-0.5V±0.125V
2.5V Core/2.5V QAx_CMOS LVPECL Output Load
Test Circuit
2V
2V
VCC
VCCO_X
VCCA
Ferrite
Bead
VEE
SCOPE
Q0
-0.5V±0.125%
2.5V/2.5V QAx_CMOS Output Load Test Circuit
nQAx_CMOS
QAx_CMOS
nQAx_CMOS
20%
QAx_CMOS
80%
tR
LVCMOS Output Duty Cycle/Pulse Width/Period
FEMTOCLOCK® NG CRYSTAL-TO-3.3V, 2.5V LVPECL/LVCMOS
CLOCK GENERATOR
Output Rise/Fall Time
12
80%
tF
20%
REVISION 1 08/21/14

12 Page





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