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PDF NT3H2111 Data sheet ( Hoja de datos )
| Número de pieza | NT3H2111 | |
| Descripción | NFC Forum Type 2 Tag compliant IC | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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NT3H2111/NT3H2211
NTAG I2C plus, NFC Forum Type 2 Tag compliant IC with I2C
interface
Rev. 3.0 — 3 February 2016
359930
Product data sheet
COMPANY PUBLIC
1. General description
Designed to be the perfect enabler for NFC in home-automation and consumer
applications, this feature-packed, second-generation connected NFC tag is the fastest,
least expensive way to add tap-and-go connectivity to just about any electronic device.
NXP NTAG I2C plus is a family of connected NFC tags that combine a passive NFC
interface with a contact I²C interface. As the second generation of NXP’s industry leading
connected-tag technology, these devices maintain full backward compatibility with
first-generation NTAG I²C products, while adding new, advanced features for password
protection, full memory-access configuration from both interfaces, and an originality
signature for protection against cloning.
The second-generation technology provides four times higher pass-through performance,
along with energy harvesting capabilities, yet NTAG I2C plus devices are optimized for
use in entry-level NFC applications and offer the lowest BoM of any NFC solution.
I²C and NFC communications are based on simple, standard command sets, and are
augmented by the demo board OM5569/NT322E, which includes online reference source
code. All that is required is a simple antenna design (see Ref. 5), with no or only limited
extra components, and there are plenty of reference designs online for inspiration.
NFC
enabled
device
Data
Energy
EEPROM
I2C
101010
Micro
controller
Energy Harvesting
Field detection
Data
Energy
Fig 1. Contactless and contact system
aaa-010357
1 page  
NXP Semiconductors
NT3H2111/NT3H2211
NFC Forum Type 2 Tag compliant IC with I2C interface
4. Ordering information
Table 1. Ordering information
Type number
Package
Name
Description
Version
NT3H2111W0FHK XQFN8
Plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 x SOT902-3
1.6 x 0.6 mm; 1k bytes memory, 50pF input capacitance
NT3H2211W0FHK XQFN8
Plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 x SOT902-3
1.6 x 0.6 mm; 2k bytes memory, 50pF input capacitance
NT3H2111W0FTT TSSOP8
Plastic thin shrink small outline package; 8 leads; body width 3 mm; 1k
bytes memory; 50pF input capacitance
SOT505-1
NT3H2211W0FTT TSSOP8
Plastic thin shrink small outline package; 8 leads; body width 3 mm; 2k
bytes memory; 50pF input capacitance
SOT505-1
NT3H2111W0FT1 SO8
Plastic small outline package; 8 leads; body width 3.9 mm, 1k bytes
memory; 50pF input capacitance
SOT96-1
NT3H2211W0FT1 SO8
Plastic small outline package; 8 leads; body width 3.9 mm, 2k bytes
memory; 50pF input capacitance
SOT96-1
NT3H2111W0FUG FFC
bumped
8 inch wafer, 150um thickness, on film frame carrier, electronic fail die
-
marking according to SECS-II format), Au bumps, 1k Bytes memory, 50pF
input capacitance
NT3H2211W0FUG FFC
bumped
8 inch wafer, 150um thickness, on film frame carrier, electronic fail die
marking according to SECS-II format), Au bumps, 2k Bytes memory, 50pF
input capacitance
-
5. Marking
Table 2. Marking codes
Type number
NT3H2111FHK
NT3H2211FHK
NT3H2111W0FTT
NT3H2211W0FTT
NT3H2111W0FT1
NT3H2211W0FT1
Line 1
211
221
32111
32211
NT32111
NT32211
Marking code
Line 2
-
-
DBSN ASID
DBSN ASID
DBSN ASID
DBSN ASID
Line 3
-
-
yww
yww
nDyww
nDyww
NT3H2111/NT3H2211
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 3 February 2016
359930
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 77
5 Page 
NXP Semiconductors
NT3H2111/NT3H2211
NFC Forum Type 2 Tag compliant IC with I2C interface
The NTAG I2C plus can only exit HALT state upon execution of the WUPA command. Any
other data received when the device is in this state is interpreted as an error, and NTAG
I2C plus state remains unchanged.
8.3 Memory organization
The memory map is detailed in Table 4 (1k memory) and Table 5 (2k memory) from the
NFC interface and in Table 6 (1k memory) and Table 7 (2k memory) from the I2C
interface. The SRAM memory is not accessible from the NFC interface, because in the
default settings of the NTAG I2C plus the pass-through mode is disabled. Please refer to
Section 11 for examples of memory map from the NFC interface with SRAM mapping.
The structure of manufacturing data, static and dynamic lock bytes, capability container
and user memory pages are compatible with other NTAG products.
Any memory access which starts at a valid address and extends into an invalid access
region will return 00h value in the invalid region.
NT3H2111/NT3H2211
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 3 February 2016
359930
© NXP Semiconductors N.V. 2016. All rights reserved.
11 of 77
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