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Número de pieza | IDT74FCT543A | |
Descripción | FAST CMOS OCTAL LATCHED TRANSCEIVER | |
Fabricantes | Integrated Device Technology | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de IDT74FCT543A (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
No Preview Available ! IDT54/74FCT543/A/C
FAST CMOS OCTAL LATCHED TRANSCEIVER
FAST CMOS
OCTAL LATCHED
TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT543/A/C
FEATURES:
− IDT54/74FCT543 equivalent to FAST™ speed
− IDT54/74FCT543A 25% faster than FAST
− IDT54/74FCT543C 40% faster than FAST
− Equivalent to FAST output drive over full temperature and voltage
supply extremes
− IOL = 64mA (commercial), 48mA (military)
− Separate controls for data flow in each direction
− Back-to-back latches for storage
− CMOS power levels (1mW typ. static)
− Substantially lower input current levels than FAST (5µ A max.)
− TTL input and output level compatible
− CMOS output level compatible
− Military product compliant to MIL-STD-883, Class B
− Available in the following packages:
• Commercial: SOIC
• Military: CERDIP, LCC, CERPACK
DESCRIPTION:
The FCT543 is a non-inverting octal transceiver built using an ad-
vanced dual metal CMOS technology. These devices contain two sets of
eight D-type latches with separate input and output controls for each set. For
data flow from A to B, for example, the A-to-B Enable (CEAB) input must be
low in order to enter data from A0–A7 or to take data from B0–B7, as indicated
in the Function Table. With CEAB low, a low signal on the A-to-B Latch
Enable (LEAB) input makes the A-to-B latches transparent; a subsequent
low-to-high transition of the LEAB signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs. With CEAB and
OEAB both low, the 3-state B output buffers are active and reflect the data
present at the output of the A latches. Control of data from B to A is similar,
but uses the CEBA, LEBA and OEBA inputs.
FUNCTIONAL BLOCK DIAGRAM
A0 3
DQ
LE
DETAIL A
QD
LE
22 B0
A1 4
A2 5
A3 6
A4 7
A5 8
A6 9
A7 10
2
OEBA
CEBA
LEBA
23
1
DETAIL A x 7
MILITARY AND COMMERCIAL TEMPERATURE RANGES
c 1999 Integrated Device Technology, Inc.
1
21 B1
20 B2
19 B3
18 B4
17 B5
16 B6
15 B7
13
OEAB
11
CEAB
14 LEAB
JUNE 2000
DSC-4602/3
1 page IDT54/74FCT543/A/C
FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT543
IDT54/74FCT543A
Com’l.
Mil.
Com’l.
Mil.
IDT54/74FCT543C
Com’l.
Mil.
Symbol
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
tH
tW
Parameter
Propagation Delay
Transparent Mode
An to Bn or Bn to An
Propagation Delay
LEBA to An, LEAB to Bn
Output Enable Time
OEBA or OEAB to An or Bn
CEBA or CEAB to An or Bn
Output Disable Time
OEBA or OEAB to An or Bn
CEBA or CEAB to An or Bn
Set-up Time, HIGH or LOW
An or Bn to LEBA or LEAB
Hold Time, HIGH or LOW
An or Bn to LEBA or LEAB
LEBA or LEAB Pulse Width LOW
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
2.5 8.5 2.5 10 2.5 6.5 2.5 7.5 2.5 5.3 2.5 6.1 ns
2.5 12.5 2.5 14 2.5 8 2.5 9 2.5 7 2.5 8 ns
2 12 2 14 2 9 2 10 2 8 2 9 ns
2 9 2 13 2 7.5 2 8.5 2 6.5 2 7.5 ns
3 — 3 — 2 — 2 — 2 — 2 — ns
2 — 2 — 2 — 2 — 2 — 2 — ns
5 — 5 — 5 — 5 — 5 — 5 — ns
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet IDT74FCT543A.PDF ] |
Número de pieza | Descripción | Fabricantes |
IDT74FCT543 | FAST CMOS OCTAL LATCHED TRANSCEIVER | Integrated Device Technology |
IDT74FCT543A | FAST CMOS OCTAL LATCHED TRANSCEIVER | Integrated Device Technology |
IDT74FCT543C | FAST CMOS OCTAL LATCHED TRANSCEIVER | Integrated Device Technology |
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