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ADP1055 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADP1055
Beschreibung Digital Controller
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
ADP1055 Datasheet, Funktion
Data Sheet
Digital Controller for Power Supply
Applications with PMBus Interface
ADP1055
FEATURES
−40°C to +125°C operation
PMBus Revision 1.2 compliant with PEC and extended
manufacturer specific commands
32-bit password protection with command masking
64 address selections (16 base addresses, expandable to 64)
6 PWM control signals, 625 ps resolution
Frequency from 48 kHz to 1 MHz
Duty cycle double update rate
Digital control loop (PID + additional pole or zero
configurability)
Programmable loop filters (CCM, DCM, low/normal
temperature)
Fast line voltage feedforward
Adaptive dead time compensation for improved efficiency
Remote voltage sense
Redundant programmable OVP
Current sense
Primary side cycle-by-cycle fast protection
Secondary side cycle-by-cycle fast overcurrent protection
Secondary side averaged reverse current protection using
diode emulation mode with fixed debounce
Synchronous rectifier control for improved efficiency
in light load mode
Nonlinear gain for faster transient response from DCM to CCM
Frequency synchronization
Soft start and soft stop functionality
Average and peak constant current mode
External PN junction temperature sensing
4 GPIOs (2 GPIOs configurable as active clamp snubber PWMs)
Extended black box data recorder for fault recording
User trimming on input and output voltages and currents
Digital current sharing
APPLICATIONS
Isolated dc-to-dc power supplies and modules
Redundant power supply systems
GENERAL DESCRIPTION
The ADP1055 is a flexible, feature-rich digital secondary side
controller that targets ac-to-dc and isolated dc-to-dc secondary
side applications. The ADP1055 is optimized for minimal
component count, maximum flexibility, and minimum design
time. Features include differential remote voltage sense, primary
and secondary side current sense, pulse-width modulation (PWM)
generation, frequency synchronization, redundant OVP, and
current sharing. The control loop digital filter and compensation
terms are integrated and can be programmed over the PMBus™
interface. Programmable protection features include
overcurrent (OCP), overvoltage (OVP) limiting, undervoltage
lockout (UVLO), and external overtemperature (OTP).
The built-in EEPROM provides extensive programming of the
integrated loop filter, PWM signal timing, inrush current, and
soft start timing and sequencing. Reliability is improved through
a built-in checksum and programmable protection circuits.
A comprehensive GUI is provided for easy design of loop filter
characteristics and programming of the safety features. The
industry-standard PMBus provides access to the many monitoring
and system test functions. The ADP1055 is available in a 32-lead
LFCSP and operates from a single 3.3 V supply.
TYPICAL APPLICATION DIAGRAM
DC
INPUT
VOUT
LOAD
DRIVER
iCoupler ®
DRIVER
SR1 SR2
CS1
OUTA
OUTB
OUTC
OUTD
VFF
CS2– CS2+
ADP1055
RES ADD JTD JRTN GPIO1 TO GPIO4 CTRL SMBALRT
OVP
SDA SCL
VS+ VS–
ISHARE
SYNC
NC
VCORE
VDD AGND DGND
VDD
Figure 1.
PMBus
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2014–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






ADP1055 Datasheet, Funktion
ADP1055
Parameter
ADC Update Rate
Measurement Accuracy
Temperature Coefficient
Leakage Current
Common-Mode Voltage Offset
Error
VS OVP DIGITAL COMPARATOR
VS OVP Accuracy
VS OVP Comparator Speed
VS UVP DIGITAL COMPARATOR
VS UVP Accuracy
Propagation Delay
VS HIGH SPEED ADC
Sampling Frequency
Equivalent Resolution
Dynamic Range
FAST OVP COMPARATOR (OVP PIN)
Threshold Accuracy
Propagation Delay (Latency)
CURRENT SENSE 1 (CS1 PIN)
Input Voltage Range
Usable Input Voltage Range
ADC Clock Frequency
Update Rate
Current Sense Measurement
Accuracy
Current Sense Measurement
CS1 Fast OCP Threshold
CS1 Fast OCP Speed
CS1 Accurate OCP Speed
Leakage Current
CURRENT SENSE 2 (CS2+, CS2−
PINS)
Current Sense Measurement
Resolution
ADC Clock Frequency
30 mV Range1
Usable Input Range
60 mV Range1
Usable Input Range
480 mV Range1
Usable Input Range
Symbol
Test Conditions/Comments
Registers are updated at this rate,
equivalent resolution of 12 bits
Factory trimmed at 1.0 V
0% to 100% of usable input voltage range
10% to 90% of usable input voltage range
900 mV to 1.1 V
VDD = 3.3 V, VS± = 1.0 V
Maximum voltage differential from VS−
to AGND of ±200 mV
Register 0xFE4D[3:2] = 00, equivalent
resolution of 7 bits
Does not include debounce time
(Register 0xFE30[13:11] = 00)
Factory trimmed at 1.206 V
Other thresholds (0.8 V to 1.6 V)
Register 0xFE2F[1:0] = 00
VIN
Registers are updated at this rate,
equivalent resolution of 12 bits
Factory trimmed at 1.0 V; tested under dc
input conditions
10% to 60% of usable input voltage range
10% to 90% of usable input voltage range
0% to 100% of usable input voltage range
Register 0xFE2C[2] = 0
Register 0xFE2C[2] = 1
For updating registers (constant current
mode enabled or disabled)
Register 0xFE4F[1:0] = 00
Register 0xFE4F[1:0] = 01
Register 0xFE4F[1] = 10
Min
−2.75
−2.0
−1.75
−0.25
−2.0
−2.0
−1.2
−2.0
0
0
−1.5
−2.0
−2.5
1.17
242
0
0
0
0
0
0
Rev. A | Page 6 of 140
Typ
10.5
82
80
10
6
±50
0
40
1
1.56
10.5
12
1.2
250
40
10.5
12
1.56
Data Sheet
Max Unit
ms
+2.75
+2.0
+1.75
110
1.0
+0.25
% FSR
% FSR
% FSR
ppm/°C
μA
% FSR
+2.0 % FSR
μs
+2.0 % FSR
μs
MHz
Bits
mV
+1.5 %
+2.0 %
80 ns
1.6 V
1.56 V
MHz
ms
+1.5 % FSR
+2.0 % FSR
+2.5 % FSR
Bits
1.23 V
258 mV
80 ns
ms
1.5 μA
Bits
MHz
30 mV
21 mV
60 mV
45 mV
480 mV
414 mV

6 Page









ADP1055 pdf, datenblatt
ADP1055
Data Sheet
Pin No.
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Mnemonic
GPIO2
GPIO1
CTRL
SCL
SDA
SMBALRT
ISHARE
VCORE
VDD
DGND
AGND
JRTN
RES
ADD
JTD
EP
Description
Programmable General-Purpose Input/Output. If this pin is not used, connect it to AGND.
Programmable General-Purpose Input/Output. If this pin is not used, connect it to AGND.
Power Supply On Input. This signal is referenced to AGND. This pin is the hardware PSON control signal. It is
recommended that a 1 nF capacitor be connected from the CTRL pin to AGND for decoupling. If this pin is not
used, connect it to AGND.
I2C/PMBus Serial Clock Input and Output (Open Drain). This signal is referenced to AGND.
I2C/PMBus Serial Data Input and Output (Open Drain). This signal is referenced to AGND.
Power-Good Output (Open Drain). This signal is referenced to AGND. This pin is also used as the PMBus ALERT
signal.
Digital Current Sharing Input and Output (Open Drain). This signal is referenced to AGND.
VDD for the Digital Core. Connect a decoupling capacitor of at least 330 nF (1 μF maximum) from this pin to DGND
as close to the IC as possible to minimize the PCB trace length. Do not use the VCORE pin as a reference or load it
in any way.
Positive Supply Input. This signal is referenced to AGND. Connect a 4.7 μF decoupling capacitor from this pin to
AGND as close to the IC as possible to minimize the PCB trace length.
Digital Ground. This pin is the ground reference for the digital circuitry. Star connect to AGND.
IC Analog Ground.
Temperature Sensor Return. If this pin is not used, connect it to AGND.
Resistor Input. This pin sets the internal reference for the internal PLL frequency. Connect a 10 kΩ resistor (±0.1%)
from RES to AGND. Do not load this pin with any capacitance. This signal is referenced to AGND.
I2C/PMBus Address Select Input. Connect a resistor from ADD to AGND. This signal is referenced to AGND.
Thermal Sensor Input. A PN junction sensor is connected from this pin to the JRTN pin. If this pin is not used,
connect it to JRTN.
Exposed Pad. For increased reliability of the solder joints and maximum thermal capability, it is recommended
that the exposed pad on the underside of the package be soldered to the PCB AGND plane.
Rev. A | Page 12 of 140

12 Page





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