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PDF PX3519 Data sheet ( Hoja de datos )
| Número de pieza | PX3519 | |
| Descripción | Synchronous Rectified Buck MOSFET driver IC | |
| Fabricantes | Infineon | |
| Logotipo |  |
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Revision 2.3, 2015-10-21
1 page  
3 Description
3.1 Pinout
PX3519
Description
Figure 2 Pinout, numbering and name of pins (transparent top view)
Table 2
Pin No.
1
2
3
5
7
8
I/O Signals
Name Pin Type Buffer Type Function
BOOT O
Analog
Floating bootstrap supply pin for the upper gate drive.
Connect the bootstrap capacitor 1) between this pin and the
PHASE pin. The bootstrap capacitor provides the charge to
turn on the upper MOSFET. See the Internal Bootstrap
Device section herein for guidance in choosing the
capacitance value.
PWM
EN
I
I
LGATE O
PHASE I
Logic
Logic
Analog
Analog
PWM drive logic input
Connect this pin to the PWM output from the controller.
Enable signal
Used to activate the device. When connected to high level
the status of the driver outputs (UGATE, LGATE), is
determined by the PWM. When connected to low level the
driver outputs are disabled regardless of signal levels on
PWM input. EN input must be driven high or low and must
not be left floating.
Low side gate signal
Connect to the gate of the low-side power N-channel
MOSFET
Return path for the upper gate driver.
Connect this pin to the source of the upper MOSFET and
the drain of the lower MOSFET. This pin provides a return
path for the upper gate drive.
UGATE O
Analog
Upper gate drive output.
Connect to the gate of high-side power N-channel MOSFET
1) See section 5.2 for guidance in choosing capaciatance value
Datasheet
5
Revision 2.3, 2015-10-21
5 Page 
PX3519
Electrical specification
Table 9
Logic Inputs And Threshold
Parameter
Symbol
EN
PWM
Input low
Input high
Input low
Input high
Input resistance
Open voltage
Tristate shutdown
window
TPFPT
V EN_LT TTB
TB
V EN_HT TTB
TB
V PWM_LT TTB
TB
V PWM_HT TTB
TB
R IN-PWMT TTB
TB
V PWM_OT TTB
TB
V PWM_ST TTB
TB
Table 10 Timing Characteristics
Parameter
Symbol
Upper Gate (UGATE) Output
Shutdown hold off time
UGATE rise time
UGATE fall time
tri-state to high propagation
delay
UGATE turn-on propagation
delay
UGATE turn-off propagation
delay
Lower Gate (LGATE) Output
Shutdown hold-off time
LGATE rise time
LGATE fall time
tri-state to low propagation
delay time
LGATE turn-on propagation
delay time
LGATE turn-off propagation
delay time
Enable (EN)
Propagation delay Time rising
falling
tSSHD_U
tr_U
tf_U
tPDTS_U
tPDH_U
tPDL_U
tSSHD_L
tr_L
tf_L
tPDTS_L
tPDH_L
tPDL_L
tPDEN
Values
Min. Typ. Max.
0.8
2.0
––
0.8
2.5
-
––
2.06 -
– 1.6 –
1.2 –
2.0
Unit
V
V
kΩ
V
Test conditions
V fallingPWMT TTB
TB
V risingPWMT TTB
TB
V = 1 VPWMT TTB
TB
V PWM_OT TTB
TB
–
Values
Min. Typ. Max.
Unit Test conditions
50 ns Note, no load
10 Note4, 3nF load
10 Note4, 3nF load
15 Note, no load
15 Note, no load
20 Note, no load
50 ns Note, no load
10 Note4, 3nF load
5 Note4, 3nF load
15 Note, no load
15 Note, no load
7 Note, no load
15 ns
4) Parameter verified by design, not 100% tested in production
Datasheet
11
Revision 2.3, 2015-10-21
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet PX3519.PDF ] | |
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