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6EDL04N06PT Schematic ( PDF Datasheet ) - Infineon

Teilenummer 6EDL04N06PT
Beschreibung High voltage gate driver IC
Hersteller Infineon
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Gesamt 25 Seiten
6EDL04N06PT Datasheet, Funktion
EiceDRIVER™
High voltage gate driver IC
6ED family - 2nd generation
3 phase 200 V and 600 V gate drive IC
6EDL04I06PT
6EDL04I06NT
6EDL04N06PT
6EDL04N02PR
EiceDRIVER™
datasheet
<Revision 2.6>, 05.08.2016
Industrial Power Control






6EDL04N06PT Datasheet, Funktion
EiceDRIVER™
6ED family - 2nd generation
List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Members of 6ED family 2nd generation .............................................................................................7
Pin Description ...................................................................................................................................11
Abs. maximum ratings........................................................................................................................14
Required Operation Conditions..........................................................................................................15
Operating range .................................................................................................................................15
Static parameters ...............................................................................................................................16
Dynamic parameters ..........................................................................................................................19
Data of reference layout .....................................................................................................................24
datasheet
6 <Revision 2.6>, 05.08.2016

6 Page









6EDL04N06PT pdf, datenblatt
EiceDRIVER™
6ED family - 2nd generation
HINx
LINx
Vcc
Schmitt-Trigger
UZ=10.5V
SWITCH LEVEL
VIH; VIL
INPUT NOISE
FILTER
HINx
LINx 5k
Schmitt-Trigger
UZ=10.5V
SWITCH LEVEL
VIH; VIL
INPUT NOISE
FILTER
Figure 5 Input pin structure for negative logic (left) and positive logic (right)
An internal pull-up of about 75 k(negative logic) pre-biases the input during supply start-up and a ESD zener
clamp is provided for pin protection purposes. The zener diodes are therefore designed for single pulse stress
only and not for continuous voltage stress over 10V. For versions with positive, a 5 kpull-down resistor is used
for this function.
a) tFILIN
b)
tFILIN a) tFILIN b) tFILIN
LIN on off
HIN
on
HIN off
LIN
on off
LIN on off
HIN
on
HIN off
LIN
on off
high
LO
HO
HO
LO low
LO
HO low
high
HO
LO
Figure 6 Input filter timing diagram for negative logic (left) and positive logic (right)
It is anyway recommended for proper work of the driver not to provide input pulse-width lower than 1 µs.
The 6ED family 2nd generation provides additionally a shoot through prevention capability which avoids the
simultaneous on-state of two channels of the same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and LO3). When
two inputs of a same leg are activated, only one leg output is activated, so that the leg is kept steadily in a safe
state.
A minimum dead time insertion of typ. 310 ns is also provided, in order to reduce cross-conduction of the
external power switches.
3.2 EN (Gate Driver Enable, Pin 10)
The signal applied to pin EN controls directly the output stages. All outputs are set to LOW, if EN is at LOW
logic level. The internal structure of the pin is given in Figure 7. The switching levels of the Schmitt-Trigger are
here VEN,TH+ = 2.1 V and VEN,TH- = 1.3 V. The typical propagation delay time is tEN = 780 ns. There is an internal
pull down resistor (75 k), which keeps the gate outputs off in case of broken PCB connection.
Figure 7
EN IEN+, IEN-
VZ= 10.5 V
INPUT NOISE
FILTER
VEN,TH+,
VEN,TH-
EN pin structures
6ED family 2nd generation
3.3 /FAULT (Fault Feedback, Pin 8)
/Fault pin is an active low open-drain output indicating the status of the gate driver (see Figure 8). The pin is
active (i.e. forces LOW voltage level) when one of the following conditions occur:
Under-voltage condition of VCC supply: In this case the fault condition is released as soon as the
supply voltage condition returns in the normal operation range (please refer to VCC pin description for
more details).
Over-current detection (ITRIP): The fault condition is latched until current trip condition is finished and
RCIN input is released (please refer to ITRIP pin).
datasheet
12 <Revision 2.6>, 05.08.2016

12 Page





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