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PDF LC05112CMT Data sheet ( Hoja de datos )
| Número de pieza | LC05112CMT | |
| Descripción | 1-Cell Lithium-Ion Battery Protection IC | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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LC05112CMT
CMOS LSI
1-Cell Lithium-Ion Battery
Protection IC with integrated
Power MOS FET
http://onsemi.com
Overview
The LC05112CMT is a protection IC for 1-cell lithium-ion secondary
batteries with integrated power MOS FET. Also it integrates highly
accurate detection circuits and detection delay circuits to prevent batteries
from over-charging, over-discharging, over-current discharging and
over-current charging.
A battery protection system can be made by only LC05112CMT and
few external parts..
WDFN6 2.6x4.0, 0.65P, Dual Flag
Feature
Charge-and-discharge power MOSFET are integrated at Ta = 25C, VCC = 4.5V
ON resistance (total of charge and discharge) 11.2m (typ)
Highly accurate detection voltage/current at Ta = 25C, VCC = 3.7V
Over-charge detection
±25mV
Over-discharge detection
±50mV
Charge over-current detection
±0.7A
Discharge over-current detection ±0.7A
Delay time for detection and release (fixed internally)
Discharge/Charge over-current detection is compensated for temperature dependency of power FET.
0V battery charging
: “Unavailable”
Over charge detection voltage
: 4.0V to 4.5V (5mV steps)
Over charge release hysteresis
: 0V to 0.3V (100mV steps)
Over discharge detection voltage
: 2.2V to 2.8V (50mV steps)
Over discharge release hysteresis
: 0V to 0.075V (25mV steps)
Discharge over current detection
: 2.0A to 8.0A (0.5A steps)
Charge over current detection
: 8.0A to -2.0A (0.5A steps)
Over-discharge detection delay time
: 20ms or 128ms
Typical Applications
Smart phone
Tablet
Wearable device
ORDERING INFORMATION
See detailed ordering and shipping information on page 15 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
September 2014 - Rev. 1
1
Publication Order Number :
LC05112CMT/D
1 page  
LC05112CMT
SELECTION GUIDE
Device
Vov(V)
LC05112C01MTTTG 4.285
Vovr(V)
4.085
Vuv(V)
2.200
Vuvr(V)
2.200
Ioc(A)
6.3
Ioch(A)
4.0
Ioc2(A)
21
Tuv(ms)
128
0Vcharge
unavailable
Pdmax-Ta graph
http://www.onsemi.com
5
5 Page 
LC05112CMT
(4) Discharging over-current detection mode 1
Internal power MOS FET as DCHG_SW will be turned off and discharging current will be shut off if CS pin
voltage will get equal to or higher than discharging over-current detection current (Ioc) over the delay time
of discharging over-current (Toc1).
This is the discharging over-current detection mode 1.
In discharging over-current detection mode 1, CS pin will be pulled down to Vss with internal resistor Rcsd.
The recovery from discharging over-current detection mode will be made after the following two conditions
are satisfied.
a. Load is removed from IC.
b. CS pin voltage will get equal to or lower than discharging over-current release current (Iocr) over the
delay time of discharging over-current release (Tocr1) due to CS pin pulled down through Rcsd.
Consequently, internal power MOS FET as DCHG_SW will be turned on, and normal mode will be
resumed.
(5) Discharging over-current detection mode 2 (short circuit detection)
Internal power MOS FET as DCHG_SW will be turned off and discharging current will be shut off if CS pin
voltage will get equal to or higher than discharging over-current detection current2 (Ioc2) over the delay
time of discharging over-current 2 (Toc2).
This is the short circuit detection mode.
In short circuit detection mode, CS pin will be pulled down to Vss by internal resistor Rcsd.
The recovery from short circuit detection mode will be made after the following two conditions are satisfied.
a. Load is removed from IC.
b. CS pin voltage will get equal to or lower than discharging over-current release current (Iocr) over the
delay time of discharging over-current release (Tocr1) due to CS pin pulled down through Rcsd.
Consequently, internal power MOS FET as DCHG_SW will be turned on, and normal mode will be
resumed.
(6) Charging over-current detection mode
Internal power MOS FET as CHG_SW will be turned off and charging current will be shut off if CS pin
voltage will get equal to or lower than charging over-current detection current (Ioch) over the delay time of
charging over-current (Toch).
This is the charging over-current detection mode.
The recovery from charging over-current detection mode will be made after the following two conditions is
satisfied.
a. Charger is removed from IC and CS pin will get higher by load connected.
b. CS pin voltage will get equal to or higher than charging over-current release current (Iochr) over the
delay time of charging over-current release (Tocrh).
Consequently, internal power MOS FET as CHG_SW will be turned on, and normal mode will be resumed.
*Internal current flows out through CS and S2 terminals.
After charger is removed, it flows through parasitic diode of CHG_SW FET.
Therefore, CS pin voltage will go up more than charging over-current release current (Iochr).
So CS pin voltage is not an indispensable condition for recovery from charging over-current detection.
(7) 0V battery charge inhibition function
When the battery (0 V battery) of internal short-circuit is connected, it is the function to forbid charge.
When battery voltage is below typ.0.9 V, the gate of FET for charge control is fixed to the PAC-terminal
voltage, and charge is forbidden.
It can charge, when battery voltage is more than 0 V battery charge prohibition battery voltage (Vinh).
http://www.onsemi.com
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| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet LC05112CMT.PDF ] | |
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