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PDF LE25S40QE Data sheet ( Hoja de datos )
| Número de pieza | LE25S40QE | |
| Descripción | 4M-bit (512K x 8) Serial Flash Memory | |
| Fabricantes | ON Semiconductor | |
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LE25S40QE
Advance Information
CMOS LSI
4M-bit (512K x 8)
Serial Flash Memory
www.onsemi.com
Overview
The LE25S40QE is a SPI bus flash memory device with a 4M bit (512K 8-
bit) configuration. It uses a single 1.8V power supply. While making the
most of the features inherent to a serial flash memory device, the
LE25S40QE is housed in an 8-pin ultra-miniature package. All these features
make this device ideally suited to storing program in applications such as
portable information devices, which are required to have increasingly more
compact dimensions. The LE25S40QE also has a small sector erase
capability which makes the device ideal for storing parameters or data that
have fewer rewrite cycles and conventional EEPROMs cannot handle due to
insufficient capacity.
VDFN8 5x6, 1.27P / VSON8T (6x5)
Features
Read/write operations enabled by single 1.8V power supply: 1.65 to 1.95V supply voltage range
Operating frequency : 40MHz
Temperature range
: 40 to 85C
Serial interface
: SPI mode 0, mode 3 supported
Sector size
: 4K bytes/small sector, 64K bytes/sector
Small sector erase, sector erase, chip erase functions
Page program function (256 bytes / page)
Block protect function
Highly reliable read/write
Number of rewrite times : 100,000 times
Small sector erase time : 40ms (typ), 150ms (max)
Sector erase time
: 80ms (typ), 250ms (max)
Chip erase time
: 300ms (typ), 3.0s (max)
Page program time : 6.0ms/256 bytes (typ), 8.0ms/256 bytes (max)
Status functions
: Ready/busy information, protect information
Data retention period : 20 years
Package
: VDFN8 5x6
* This product is licensed from Silicon Storage Technology, Inc. (USA).
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
ORDERING INFORMATION
See detailed ordering and shipping information on page 22 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
November 2014 - Rev. P0
1
Publication Order Number :
LE25S40QE/D
1 page  
Table 3 Memory Organization
4M Bit
sector(64KB)
7
6
5
4
3
2
1
0
LE25S40QE
small sector
127
to
112
111
to
96
95
to
80
79
to
64
63
to
48
47
to
32
31
to
16
15
to
2
1
0
address space(A23 to A0)
07F000h
07FFFFh
070000h
06F000h
070FFFh
06FFFFh
060000h
05F000h
060FFFh
05FFFFh
050000h
04F000h
050FFFh
04FFFFh
040000h
03F000h
040FFFh
03FFFFh
030000h
02F000h
030FFFh
02FFFFh
020000h
01F000h
020FFFh
01FFFFh
010000h
00F000h
010FFFh
00FFFFh
002000h
001000h
000000h
002FFFh
001FFFh
000FFFh
www.onsemi.com
5
5 Page 
LE25S40QE
6. Small Sector Erase
Small sector erase is an operation that sets the memory cell data in any small sector to "1". A small sector consists of
4Kbytes. "Figure 11 Small Sector Erase" shows the timing waveforms, and Figure 20 shows a small sector erase
flowchart. The small sector erase command consists of the first through fourth bus cycles, and it is initiated by
inputting the 24-bit addresses following (20h) or (D7h). Addresses A18 to A12 are valid, and Addresses A23 to A19
are "don't care". After the command has been input, the internal erase operation starts from the rising CS edge, and it
ends automatically by the control exercised by the internal timer. Erase end can also be detected using status register
RDY.
Figure 11 Small Sector Erase
CS
Self-timed
Erase Cycle
tSSE
SCK
SI
SO
Mode3 0 1 2 3 4 5 6 7 8
Mode0
15 16 23 24 31
8CLK
20h / D7h
MSB
Add. Add. Add.
High Impedance
7. Sector Erase
Sector erase is an operation that sets the memory cell data in any sector to "1". A sector consists of 64Kbytes.
"Figure 12 Sector Erase" shows the timing waveforms, and Figure 20 shows a sector erase flowchart. The sector
erase command consists of the first through fourth bus cycles, and it is initiated by inputting the 24-bit addresses
following (D8h). Addresses A18 to A16 are valid, and Addresses A23 to A19 are "don't care". After the command
has been input, the internal erase operation starts from the rising CS edge, and it ends automatically by the control
exercised by the internal timer. Erase end can also be detected using status register RDY.
Figure 12 Sector Erase
Self-timed
Erase Cycle
tSE
CS
SCK
SI
SO
Mode3
Mode0
012345678
15 16 23 24 31
8CLK
MSB
D8h
Add. Add. Add.
High Impedance
www.onsemi.com
11
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