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R5F51137AGFM Schematic ( PDF Datasheet ) - Renesas

Teilenummer R5F51137AGFM
Beschreibung 32-Bit MCU
Hersteller Renesas
Logo Renesas Logo 




Gesamt 30 Seiten
R5F51137AGFM Datasheet, Funktion
Cover
RX113 Group
32
User’s Manual: Hardware
RENESAS 32-Bit MCU
RX Family / RX100 Series
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (http://www.renesas.com).
www.renesas.com
Rev.1.02 Dec 2014






R5F51137AGFM Datasheet, Funktion
How to Use This Manual
1. Objective and Target Users
This manual was written to explain the hardware functions and electrical characteristics of this LSI to the target
users, i.e. those who will be using this LSI in the design of application systems. Target users are expected to
understand the fundamentals of electrical circuits, logic circuits, and microcomputers.
This manual is organized in the following items: an overview of the product, descriptions of the CPU, system
control functions, and peripheral functions, electrical characteristics of the device, and usage notes.
When designing an application system that includes this LSI, take all points to note into account.
Points to note are given in their contexts and at the final part of each section, and in the section giving usage notes.
The list of revisions is a summary of major points of revision or addition for earlier versions. It does not cover all
revised items. For details on the revised points, see the actual locations in the manual.
The following documents have been prepared for the RX113 Group. Before using any of the documents, please visit
our website to verify that you have the most up-to-date available version of the document.
Document Type
Datasheet
User’s Manual:
Hardware
User’s Manual:
Software
Application Note
Renesas Technical
Update
Contents
Overview of hardware and electrical characteristics
Hardware specifications (pin assignments, memory maps,
peripheral specifications, electrical characteristics, and
timing charts) and descriptions of operation
Detailed descriptions of the CPU and instruction set
Examples of applications and sample programs
Preliminary report on the specifications of a product,
document, etc.
Document Title
RX113 Group
Datasheet
RX113 Group
User’s Manual:
Hardware
RX Family
User’s Manual:
Software
Document No.
R01DS0216EJ
This document
R01US0032EJ

6 Page









R5F51137AGFM pdf, datenblatt
9.2.16 LCD Source Clock Control Register 2 (LCDSCLKCR2) ........................................................ 179
9.2.17 Main Clock Oscillator Wait Control Register (MOSCWTCR) ................................................ 180
9.2.18 High-Speed On-Chip Oscillator Wait Control Register (HOCOWTCR) ................................ 181
9.2.19 CLKOUT Output Control Register (CKOCR) ......................................................................... 182
9.2.20 Main Clock Oscillator Forced Oscillation Control Register (MOFCR) ................................... 183
9.3 Main Clock Oscillator ....................................................................................................................... 184
9.3.1
Connecting a Crystal ................................................................................................................ 184
9.3.2
External Clock Input ................................................................................................................. 185
9.3.3
Handling of Pins When the Main Clock is Not Used ............................................................... 185
9.3.4
Notes on the External Clock Input ........................................................................................... 185
9.4 Sub-Clock Oscillator ......................................................................................................................... 186
9.4.1
Connecting 32.768-kHz Crystal ............................................................................................... 186
9.4.2
Handling of Pins When Sub-Clock is Not Used ....................................................................... 186
9.5 Oscillation Stop Detection Function .................................................................................................. 187
9.5.1
Oscillation Stop Detection and Operation after Detection ....................................................... 187
9.5.2
Oscillation Stop Detection Interrupts ....................................................................................... 188
9.6 PLL Circuit ........................................................................................................................................ 189
9.7 Internal Clock .................................................................................................................................... 189
9.7.1
System Clock ............................................................................................................................ 189
9.7.2
Peripheral Module Clock .......................................................................................................... 189
9.7.3
FlashIF Clock ........................................................................................................................... 189
9.7.4
USB Clock ................................................................................................................................ 190
9.7.5
LCD Source Clock .................................................................................................................... 190
9.7.6
CAC Clock ............................................................................................................................... 190
9.7.7
RTC-Dedicated Clock .............................................................................................................. 190
9.7.8
IWDT-Dedicated Clock ............................................................................................................ 190
9.7.9
SSI Clock .................................................................................................................................. 190
9.8 Usage Notes ....................................................................................................................................... 191
9.8.1
Notes on Clock Generation Circuit .......................................................................................... 191
9.8.2
Notes on Resonator ................................................................................................................... 191
9.8.3
Notes on Board Design ............................................................................................................. 191
9.8.4
Notes on Sub-Clock .................................................................................................................. 192
10. Clock Frequency Accuracy Measurement Circuit (CAC) ............................................................. 196
10.1 Overview ........................................................................................................................................... 196
10.2 Register Descriptions ......................................................................................................................... 198
10.2.1 CAC Control Register 0 (CACR0) ........................................................................................... 198
10.2.2 CAC Control Register 1 (CACR1) ........................................................................................... 199
10.2.3 CAC Control Register 2 (CACR2) ........................................................................................... 200
10.2.4 CAC Interrupt Request Enable Register (CAICR) ................................................................... 201
10.2.5 CAC Status Register (CASTR) ................................................................................................ 202
10.2.6 CAC Upper-Limit Value Setting Register (CAULVR) ........................................................... 203

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