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PDF IN25AA160N Data sheet ( Hoja de datos )
| Número de pieza | IN25AA160N | |
| Descripción | NONVOLATILE ELECTRICALLY ERASABLE PROM | |
| Fabricantes | Integral | |
| Logotipo |  |
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IN25АА080N, IN25АА080D, IN25АА160N, IN25АА160D
NONVOLATILE ELECTRICALLY ERASABLE PROM WITH SERIAL
PERIPHERAL INTERFACE (SPI).
functionally compartible to 25AA080, 25AA160 (Microchip)
DESCRIPTION
The IN25АА080N/D are a 8K(1Kx8) serial Electrically Erasable PROM with SPI interface.
*The IN25АА160N/D are a 16K (2Kx8) serial Electrically Erasable PROM with SPI interface (SPI).
The ICs is purposed for reading, writing & nonvolatile data storage in electronic units with SPI interface. ICs
are realized in SO-8 (MS-012АA) and DIP-8 (MS-001BA)
FEATURES
- Data capacity, QINF:
for IN25АА080N, IN25АА080D
for IN25АА160N, IN25АА160D
8192 bit,
16384 bit;
- Maximum clock frequency, fC:
for 4,5 V ≤ UCC ≤ 5,5 V
for 2,5 V ≤ UCC ≤ 5,5 V
for 1,8 V ≤ UCC ≤ 5,5 V
- Maximum stand-by current, ICC:
for UCC = 5,5 V, UIL = 0 V, UIH = UCC
for UCC = 2,5 V, UIL = 0 V, UIH = UCC
- Maximum read current, IOCCR :
3 MHz;
2 MHz;
1 MHz;
5,0 uA
1,0 uA;
for UCC = 5,5 В, fC = 3,0 МГц, SO pin is not loaded .…1,0 mA,
for UCC = 2,5 В, fC = 2,0 МГц, SO pin is not loaded …..0,5 mA;
- Maximum write current, IOCCW :
for UCC = 5,5 V
5,0 mA;
for UCC = 2,5 V
3,0 mA;
- Byte & page (16 bytes) data write modes are available;
- Endurance NE/W, …...1000000 cycles;
- Build-in write protection block
- Write protection for 1/4, 1/2, or all of storage array;
- Power on/off data protection circuitry;
- Supply voltage UCC 1,8 … 5,5 V;
- Operating temperature range -40 … +85°C.
- 100 years non-volatile data retention time
N SUFFIX
DIP
8
1 D SUFFIX
8 SOIC
1
Pin
Name
CS
SO
WP
GND
SI
SCK
HOLD
VCC
Function
Chip Select
Serial Data Output
Write protection
Ground
Serial Data Input
Clock Input
Hold input *
Power Supply
PIN FUNCTIONS
CS 01
SO 02
WP 03
GND 04
08 Vcc
07 HOLD
06 SCK
05 SI
Ver.00/13.10.2008
IN25AA080(160)-TSe
1 2263040
1 page  
IN25АА080N, IN25АА080D, IN25АА160N, IN25АА160D
Data read sequence
There are six 8-bit instructions available for executing of read/write operation. The feature
of IN25AA080N, IN25AA080D (IN25AA160N, IN25AA160D) is that 6 (5) higher address bits are
insignificant ( have to be ignored).
Enable/disable instructions а) “Write enable” - WREN & b) “Write disable” - WRDI
a) b)
The powers up set ICs in the write disable state. For writing operation after power-up or
after an WRDI (write disable) instruction, WREN (write enable) instruction must be issued.
Any read/write operation can be executed on condition CS =0 (enable signal) , high level on CS
pin switch IC to standby mode. Already intiated programming cycle will be comleted independently
from CS signal. A low to high transition on CS after a valid write sequence initiates an internal
write cycle.
Ver.00/13.10.2008
IN25AA080(160)-TSe
5 2263040
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet IN25AA160N.PDF ] | |
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