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CMS66P47 Schematic ( PDF Datasheet ) - Cmsemicon

Teilenummer CMS66P47
Beschreibung 8-Bit OTP MCU
Hersteller Cmsemicon
Logo Cmsemicon Logo 




Gesamt 30 Seiten
CMS66P47 Datasheet, Funktion
CMS66P01/02/47/22/23
CMS66P01/02/47/22/23
8-Bit OTP MCU
Data Sheet
http;//www.mcu.com.cn
P. 1
MAR-2008 VER1.1






CMS66P47 Datasheet, Funktion
CMS66P01/02/47/22/23
4. Data Memory Map
Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10~1Fh
20~2Fh
30~3Fh
40~4Fh
50~5Fh
60~6Fh
70~7Fh
Name
IAR
TMR
PCL
FLAGS
FSR
P0
P1
P2
P3
ADDATA
ADCON
ADPORT
COMPCON
------
------
------
Descirption
Uses contents of FSR to address
data memory (not a physical
register)
Timer0 Module Register
Low 8 bits of PC
Flags
Indirect data memory address
pointer
P0 data register
P1 data register
P2 data register
P3 data register
ADC data register
ADC control register
ADC channel register
General purpose register
Comparator and Pullup Resistor
Control Resgister
General purpose register
General purpose register
General purpose registers
Prohibited Access
General purpose registers
Prohibited Access
General purpose registers
Prohibited Access
General purpose registers
Value
Power-on
Reset
on
xxxx xxxx
xxxx xxxx
1111 1111
0001 1xxx
1xxx xxxx
xxxx xxxx
xxxx xxxx
-xxx xxxx
---- -xxx
xxxx xxxx
0000 0000
0000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
----- ----
xxxx xxxx
----- ----
xxxx xxxx
----- ----
xxxx xxxx
Legend: x = unknown, u = unchanged, – = unimplemented, read as '0' (if
applicable).
Data memory is composed of registers, or bytes of RAM. Therefore, data
memory for a device is specified by its register file. The register file is divided
into two functional groups: Special Function Registers and General Purpose
Registers.
The Special Function Registers include the TMR0 register, the Program
Counter (PC), the FLAGS Register, the I/O registers (ports) and the File Select
http;//www.mcu.com.cn
P. 6
MAR-2008 VER1.1

6 Page









CMS66P47 pdf, datenblatt
CMS66P01/02/47/22/23
10 A/D clock is fosc/32
11 A/D clock is fosc/64
Bit6 1 to 0 then the A/D begin
Bit7 = 0 A/D converter begin
ADPORT
The ADPORT register, is located at address 0BH. This register define the
AN0~AN7 is analog input or normal I/O
A/D port define,B[7:0] decide AN[7:0] is analog input pin or I/O input pin.
0--- normal I/O
1--- analog input
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
0 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0
I/O I/O I/O I/O I/O I/O I/O I/O
1 AN7 AN6 AN5 AN4 AN3 AN2 AN1 AN0
Example:
LDIA B’00000111’
LD ADPORT,A ;AN0AN1AN2 are ADC ports
LDIA B’00000001’
LD ADCON,A ;select AN1as ADC input and fadc= fosc/2
SETB ADCON,7
;set ADCON.7
NOP
NOP
NOP
NOP
CLRB ADCON,7
;1 to 0 on ADCON.7 then ADC begin
WAIT
SZB ADCON,6
;waiting the ADC over
JP WAIT
LD A, ADDATA
LD USER_DEFINE_RAM, A
……
COMPCON Register
B[7] B[6] B[5] B[4] B[3] B[2] B[1] B[0]
B[7] ----- no used
B[6] ----- + Input Control bit of Comparator1
0 – the + input of comparator1 connect to GND, P1.1 can be used
http;//www.mcu.com.cn
P. 12
MAR-2008 VER1.1

12 Page





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