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PDF SSM2301 Data sheet ( Hoja de datos )
| Número de pieza | SSM2301 | |
| Descripción | Filterless High Efficiency Mono 1.4 W Class-D Audio Amplifier | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SSM2301 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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Filterless High Efficiency
Mono 1.4 W Class-D Audio Amplifier
SSM2301
FEATURES
Filterless Class-D amplifier with Σ-Δ modulation
No sync necessary when using multiple Class-D amplifiers
from Analog Devices, Inc.
1.4 W into 8 Ω at 5.0 V supply with less than 1% THD + N
85% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Greater than 98 dB SNR (signal-to-noise ratio)
Single-supply operation from 2.5 V to 5.0 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Available in 8-lead, 3 mm × 3 mm LFCSP and MSOP packages
Pop-and-click suppression
Built-in resistors reduce board component count
Fixed and user-adjustable gain configurations
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
GENERAL DESCRIPTION
The SSM2301 is a fully integrated, high efficiency, Class-D audio
amplifier designed to maximize performance for mobile phone
applications. The application circuit requires a minimum of
external components and operates from a single 2.5 V to 5.0 V
supply. It is capable of delivering 1.4 W of continuous output
power with less than 1% THD + N driving an 8 Ω load from
a 5.0 V supply.
The SSM2301 features a high efficiency, low noise modulation
scheme that does not require external LC output filters. The modu-
lation provides high efficiency even at low output power.
The SSM2301 operates with 85% efficiency at 1.4 W into 8 Ω
from a 5.0 V supply and has a signal-to-noise ratio (SNR) that
is greater than 98 dB. Spread-spectrum modulation is used to
provide lower EMI-radiated emissions compared with other
Class-D architectures.
The SSM2301 has a micropower shutdown mode with a maximum
shutdown current of 30 nA. Shutdown is enabled by applying
a logic low to the SD pin.
The device also includes pop-and-click suppression circuitry.
This minimizes voltage glitches at the output during turn-on
and turn-off, thus reducing audible noise on activation and
deactivation.
The fully differential input of the SSM2301 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately VDD/2.
The SSM2301 also has excellent rejection of power supply noise,
including noise caused by GSM transmission bursts and RF
rectification. PSRR is typically 63 dB at 217 Hz.
The gain can be set to 6 dB or 12 dB by utilizing the gain control
select pin connected respectively to ground or to VDD. Gain
can also be adjusted externally by inserting a resistor in series
with each input pin.
The SSM2301 is specified over the commercial temperature range
(−40°C to +85°C). It has built-in thermal shutdown and output
short-circuit protection. It is available in both an 8-lead, 3 mm ×
3 mm lead-frame chip scale package (LFCSP) and an 8-lead
MSOP package.
FUNCTIONAL BLOCK DIAGRAM
10µF
0.1µF
VBATT
2.5V TO 5.0V
0.01µF1
AUDIO IN+
AUDIO IN–
0.01µF1
SSM2301
IN+
GAIN
IN– CONTROL
GAIN
VDD
MODULATOR
FET
DRIVER
OUT+
OUT–
SHUTDOWN
SD
BIAS
OSCILLATOR
POP/CLICK
SUPPRESSION
GND
NOTES
1 INPUT CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY VDD/2.
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
1 page  
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
SSM2301
SD 1
GAIN 2
IN+ 3
IN– 4
PIN 1
INDICATOR
SSM2301
TOP VIEW
(Not to Scale)
8 OUT–
7 GND
6 VDD
5 OUT+
Figure 2. LFCSP Pin Configuration
SD 1
GAIN 2
IN+ 3
IN– 4
SSM2301
TOP VIEW
(Not to Scale)
8 OUT–
7 GND
6 VDD
5 OUT+
Figure 3. MSOP Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
1 SD
2 GAIN
3 IN+
4 IN−
5 OUT+
6 VDD
7 GND
8 OUT−
Description
Shutdown Input. Active low digital input.
Gain Selection. Digital input.
Noninverting Input.
Inverting Input.
Noninverting Output.
Power Supply.
Ground.
Inverting Output.
Rev. A | Page 5 of 16
5 Page 
EXTERNAL GAIN SETTINGS = 20 log[4/(1 + R/150kΩ)]
10µF
0.01µF R
AUDIO IN
R
0.01µF VDD
SSM2301
IN+
GAIN
IN– CONTROL
GAIN
SHUTDOWN
SD
BIAS
0.1µF
VBATT
2.4V TO 5.0V
VDD
MODULATOR
FET
DRIVER
OUT+
OUT–
OSCILLATOR
POP/CLICK
SUPPRESSION
GND
Figure 27. Single-Ended Input Configuration, User-Adjustable Gain
EXTERNAL GAIN SETTINGS = 20 log[2/(1 + R/150kΩ)]
10µF
0.1µF
VBATT
2.4V TO 5.0V
AUDIO IN+
AUDIO IN–
0.01µF1
0.01µF1
R
R
SSM2301
IN+
GAIN
IN– CONTROL
GAIN
VDD
MODULATOR
FET
DRIVER
OUT+
OUT–
SHUTDOWN
SD
BIAS
OSCILLATOR
POP/CLICK
SUPPRESSION
GND
NOTES
1 INPUT CAPACITORS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY VDD/2.
Figure 28. Differential Input Configuration, User-Adjustable Gain
EXTERNAL GAIN SETTINGS = 20 log[2/(1 + R/150kΩ)]
10µF
0.01µF R
AUDIO IN
0.01µF R
SHUTDOWN
SSM2301
IN+
GAIN
IN– CONTROL
GAIN
SD
BIAS
0.1µF
VBATT
2.4V TO 5.0V
VDD
MODULATOR
FET
DRIVER
OUT+
OUT–
OSCILLATOR
POP/CLICK
SUPPRESSION
GND
Figure 29. Single-Ended Input Configuration, User-Adjustable Gain
SSM2301
Rev. A | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet SSM2301.PDF ] | |
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