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PDF STU1HN60K3 Data sheet ( Hoja de datos )
| Número de pieza | STU1HN60K3 | |
| Descripción | N-CHANNEL POWER MOSFET | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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STD1HN60K3, STU1HN60K3
N-channel 600 V, 6.7 Ω typ., 1.2 A SuperMESH3™ Power MOSFET
in DPAK and IPAK packages
Datasheet − production data
TAB
3
1
DPAK
TAB
IPAK
3
2
1
Figure 1. Internal schematic diagram
D(2, TAB)
Features
Order codes VDS
STD1HN60K3
600 V
STU1HN60K3
RDS(on)
max
8Ω
ID PTOT
1.2 A 27 W
• 100% avalanche tested
• Extremely high dv/dt capability
• Gate charge minimized
• Very low intrinsic capacitance
• Improved diode reverse recovery
characteristics
• Zener-protected
Applications
• Switching applications
G(1)
S(3)
AM01476v1
Description
These SuperMESH3™ Power MOSFETs are the
result of improvements applied to
STMicroelectronics’ SuperMESH™ technology,
combined with a new optimized vertical structure.
These devices boast an extremely low on-
resistance, superior dynamic performance and
high avalanche capability, rendering them suitable
for the most demanding applications.
Order codes
STD1HN60K3
STU1HN60K3
Table 1. Device summary
Marking
Package
1HN60K3
DPAK
IPAK
Packaging
Tape and reel
Tube
April 2013
This is information on a product in full production.
DocID024422 Rev 1
1/19
www.st.com
19
1 page  
STD1HN60K3, STU1HN60K3
Electrical characteristics
Table 6. Switching times
Symbol
Parameter
Test conditions
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
VDD = 300 V, ID = 0.6 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 10)
Min. Typ. Max Unit
- 7 - ns
- 10 - ns
- 23 - ns
- 31 - ns
Symbol
Table 7. Source drain diode
Parameter
Test conditions
Min. Typ. Max Unit
ISD
ISDM (1)
VSD (2)
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 1.2 A, VGS = 0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 1.2 A, di/dt = 100 A/µs
VDD= 60 V
(see Figure 11)
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 1.2 A, di/dt = 100 A/µs
VDD= 60 V TJ = 150 °C
(see Figure 11)
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
- 1.2 A
- 4.8 A
- 1.6 V
- 180
ns
- 500
nC
- 5.6
A
- 200
ns
- 570
nC
-6
A
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
V(BR)GSO
Gate-source breakdown
voltage
IGS= ± 1 mA, ID=0
Min. Typ. Max. Unit
30 -
-V
The built-in back-to-back Zener diodes have been specifically designed to enhance not only
the device’s ESD capability, but also to make them capable of safely absorbing any voltage
transients that may occasionally be applied from gate to source. In this respect, the Zener
voltage is appropriate to achieve efficient and cost-effective protection of device integrity.
The integrated Zener diodes thus eliminate the need for external components.
DocID024422 Rev 1
5/19
5 Page 
STD1HN60K3, STU1HN60K3
Package mechanical data
Dim.
A
A1
A2
b
b4
c
c2
D
D1
E
E1
e
e1
H
L
(L1)
L2
L4
R
V2
Table 9. DPAK (TO-252) mechanical data
mm
Min.
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
6.40
4.40
9.35
1.00
0.60
0°
Typ.
5.10
4.70
2.28
2.80
0.80
0.20
Max.
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
6.60
4.60
10.10
1.50
1.00
8°
DocID024422 Rev 1
11/19
11 Page | ||
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