HEF4027B-Q100 Datasheet PDF - NXP Semiconductors
| Part Number | HEF4027B-Q100 | |
| Description | Dual JK flip-flop | |
| Manufacturers | NXP Semiconductors | |
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HEF4027B-Q100
Dual JK flip-flop
Rev. 1 — 26 June 2013
Product data sheet
1. General description
The HEF4027B-Q100 is an edge-triggered dual JK flip-flop which features independent
set-direct (SD), clear-direct (CD), clock (CP) inputs and outputs (Q, Q). Data is accepted
when CP is LOW, and transferred to the output on the positive-going edge of the clock.
The active HIGH asynchronous clear-direct (CD) and set-direct (SD) inputs are
independent and override the J, K, and CP inputs. The outputs are buffered for best
system performance. Schmitt trigger action makes the clock input highly tolerant of slower
rise and fall times.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 3) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 3)
Specified from 40 C to +85 C
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
ESD protection:
MIL-STD-833, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Complies with JEDEC standard JESD 13-B
3. Applications
Registers
Counters
Control circuits
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NXP Semiconductors
HEF4027B-Q100
Dual JK flip-flop
10. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD; unless otherwise specified.
Symbol Parameter
Conditions
VDD
VIH HIGH-level input voltage IO < 1 A
5V
10 V
15 V
VIL LOW-level input voltage IO < 1 A
5V
10 V
15 V
VOH
HIGH-level output voltage
IO < 1 A
5V
10 V
15 V
VOL
LOW-level output voltage
IO < 1 A
5V
10 V
15 V
IOH
HIGH-level output current
VO = 2.5 V
5V
VO = 4.6 V
5V
VO = 9.5 V
10 V
VO = 13.5 V
15 V
IOL
LOW-level output current
VO = 0.4 V
5V
VO = 0.5 V
10 V
VO = 1.5 V
15 V
II input leakage current
15 V
IDD supply current
IO = 0 A
5V
10 V
15 V
CI input capacitance
-
Tamb = 40 C Tamb = 25 C Tamb = 85 C Unit
Min Max Min Max Min Max
3.5 - 3.5 - 3.5 - V
7.0 - 7.0 - 7.0 - V
11.0 - 11.0 - 11.0 - V
- 1.5 - 1.5 - 1.5 V
- 3.0 - 3.0 - 3.0 V
- 4.0 - 4.0 - 4.0 V
4.95 - 4.95 - 4.95 - V
9.95 - 9.95 - 9.95 - V
14.95 - 14.95 - 14.95 - V
- 0.05 - 0.05 - 0.05 V
- 0.05 - 0.05 - 0.05 V
- 0.05 - 0.05 - 0.05 V
- 1.7 - 1.4 - 1.1 mA
- 0.52 - 0.44 - 0.36 mA
- 1.3 - 1.1 - 0.9 mA
- 3.6 - 3.0 - 2.4 mA
0.52 - 0.44 - 0.36 - mA
1.3 - 1.1 - 0.9 - mA
3.6 - 3.0 - 2.4 - mA
- 0.3 - 0.3 - 1.0 A
- 4.0 - 4.0 - 30 A
- 8.0 - 8.0 - 60 A
- 16.0 - 16.0 - 120 A
-
-
- 7.5 -
- pF
HEF4027B_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 26 June 2013
© NXP B.V. 2013. All rights reserved.
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