PDF RK3128 Data sheet ( Hoja de datos )

Número de pieza	RK3128
Descripción	high performance Quad-core application processor
Fabricantes	Rockchip
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No Preview Available ! RK3128 datasheet Rev 0.6 Rockchip RK3128 Datasheet Revision 0.6 Aug. 2014 1 1 page RK3128 datasheet Rev 0.6 Figure Index Fig.1-1RK3128 Block Diagram .............................................................. 20 Fig.1-2RK3128 TFBGA316 Package Top View .......................................... 40 Fig.1-3RK3128 TFBGA316 Package Side View ......................................... 40 Fig.1-4RK3128 TFBGA316 Package Bottom View ..................................... 41 Fig.1-5RK3128 TFBGA316 Package Dimension ........................................ 41 Fig.1-6TFBGA316 Ball Map ................................................................... 43 Fig.1-7 External Reference Circuit for 24MHzOscillators ............................ 54 Fig.1-8RK3128 USB OTG/Host2.0 differential lines requirement. ................ 55 Fig.1-9RK3128 USB OTG/Host2.0 ground plane guide. ............................. 56 Fig.1-10RK3128 USB OTG/Host2.0 component placement......................... 56 Fig.1-11RK3128 HDMI interface reference connection .............................. 56 Fig.1-12RK3128 HDMI CEC interface reference connection........................ 57 Fig.1-13RK3128 HDMI ESD interface reference connection ....................... 57 Fig.1-14RK3128 Audio Codec interface reference connection..................... 58 Fig.1-15 RK3128 reset signals sequence ................................................ 58 5 5 Page RK3128 datasheet Rev 0.6  Display interconnect with three 128-bits AXI master, four 64-bits AXI masters and one 32-bits AHB slave  GPU interconnect with one 128-bits AXI master with point-to-point AXI-lite architecture and 32-bits APB slave  VCODEC interconnect also with two 64-bits AXI master and two 32-bits AHB slave, they are point-to-point AXI-lite architecture  Flexible different QoS solution to improve the utility of bus bandwidth  Interrupt Controller  Support 3 PPI interrupt source and 74 SPI interrupt sources input from different components inside RK3128  Support 16 softwre-triggered interrupts  Input interrupt level is fixed , only high-level sensitive  Two interrupt outputs (nFIQ and nIRQ)separatelyfor each Cortex-A7, both are low-level sensitive  Support different interrupt priority for each interrupt source, and they are always software-programmable  DMAC  Micro-code programming based DMA  The specific instruction set provides flexibility for programming DMA transfers  Linked list DMA function is supported to complete scatter-gather transfer  Support internal instruction cache  Embedded DMA manager thread  Support data transfer types with memory-to-memory, memory-to-peripheral, peripheral-to-memory  Signals the occurrence of various DMA events using the interrupt output signals  Mapping relationship between each channel and different interrupt outputs is software-programmable  One embedded DMA controller PERI_DMAC for peripheral system  PERI_DMAC features:  8 channels totally  16 hardware request from peripherals  2 interrupt output  Not support trustzone technology  Security system  Embedded encryption and decryption engine  Support AES 128/192/256 bits key mode, ECB/CBC/CTR chain mode, Slave/FIFO mode  Support DES/3DES (ECB and CBC chain mode) , 3DES (EDE/ EEE key mode), Slave/FIFO mode  Support SHA1/SHA256/MD5 (with hardware padding) HASH function, FIFO mode only  Support 160 bit Pseudo Random Number Generator (PRNG)  Support PKA 512/1024/2048 bit Exp Modulator 1.1.6 Video CODEC  Shared internal memory and bus interface for video decoder and encoder②  Embedded memory management unit(MMU) 11 11 Page

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