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PDF PE42540 Data sheet ( Hoja de datos )
| Número de pieza | PE42540 | |
| Descripción | UltraCMOS SP4T RF Switch | |
| Fabricantes | Peregrine Semiconductor | |
| Logotipo |  |
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Product Description
The PE42540 is a HaRP™ technology-enhanced
absorptive SP4T RF switch developed on UltraCMOS®
process technology. This switch is designed specifically
to support the requirements of the test equipment and
ATE market. It is comprised of four symmetric RF ports
and has very high isolation. An on-chip CMOS decode
logic facilitates a two-pin low voltage CMOS control
interface and an optional external VSS feature. High
ESD tolerance and no blocking capacitor requirements
make this the ultimate in integration and ruggedness.
The PE42540 is manufactured on Peregrine’s
UltraCMOS® process, a patented variation of silicon-on-
insulator (SOI) technology on a sapphire substrate,
offering the performance of GaAs with the economy
and integration of conventional CMOS.
Product Specification
PE42540
UltraCMOS® SP4T RF Switch
10 Hz – 8 GHz
Features
HaRP™ technology enhanced
Fast settling time
Eliminates gate and phase lag
No drift in insertion loss and phase
High linearity: 58 dBm IIP3
Low insertion loss: 0.8 dB @ 3 GHz,
1.0 dB @ 6 GHz and 1.2 dB @ 8 GHz
High isolation: 45 dB @ 3 GHz,
39 dB @ 6 GHz and 31 dB @ 8 GHz
Maximum power handling: 30 dBm @
8 GHz
High ESD tolerance of 2 kV HBM on
RFC and 1 kV HBM on all other pins
Figure 1. Functional Diagram
RFC
Figure 2. Package Type
32-lead 5x5 mm LGA
RF1
ESD
50
RF3
ESD
50
ESD
50
RF2
CMOS Control/
Driver and ESD
ESD
50
RF4
VDD V1
V2 VssEXT
71-0067
Document No. DOC-32914-2 | www.psemi.com
©2010-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 12
1 page  
PE42540
Product Specification
Low Frequency Operation
Table 6 shows the minimum and maximum
voltage limits when operating the device under
various VDD and VssEXT voltage conditions below
9 kHz. Refer to Figures 4, 5, and 6 to determine
the maximum operating power over the frequency
range of the device.
Table 6. Instantaneous RF Pin Voltage Limits
for Operation Below 9 kHz
VDD
VssEXT
Minimum Peak
Voltage at RF Port
Maximum Peak
Voltage at RF Port
≥3.0
3.0
3.3
3.5
3.6
0.0
–3.0
–3.3
–3.5
–3.6
–0.2
–0.6
–0.3
–0.1
0.0
1.2
1.6
1.3
1.1
1.0
Maximum Operating Power vs. Frequency
Figures 4, 5, and 6 show the power limit of the
device will increase with frequency. As the
frequency increases, the contours and maximum
power limit will increase as shown in the curves.
Document No. DOC-32914-2 | www.psemi.com
©2010-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 12
5 Page 
PE42540
Product Specification
Figure 23. Package Drawing
A
B
5.00
0.10 C
(2X)
DETAIL A
0.50
(x28)
16
17
3.03±0.05
24
25
0.34
0.485 (x32)
(x32)
0.50
(x28)
5.00
0.10 C
(2X)
Pin #1 Corner
0.10 C
0.70
0.05 C
SEATING PLANE
0.535
TOP VIEW
SIDE VIEW
0.10
0.04
0.11
0.10
DETAIL A
3.50
0.34
(x32)
0.26±0.05
(x32)
9
1.01 MAX
8
3.50
BOTTOM VIEW
0.24
C
0.10 C A B
0.05 C
ALL FEATURES
3.03±0.05 3.08
4.90
32
1
0.435±0.050
(x32)
DETAIL B
3.08
4.90
RECOMMENDED LAND PATTERN
DOC-01877
0.15
0.424
45° CHAMFER
DETAIL B
Figure 24. Marking Specifications
42540
YYWW
ZZZZZZ
DOC-51207
YYWW = Date Code
ZZZZZ = Last six digits of Lot Number
Document No. DOC-32914-2 | www.psemi.com
©2010-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 11 of 12
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet PE42540.PDF ] | |
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