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Teilenummer | VT1115M |
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Beschreibung | MULTIPHASE SWITCHING REGULATOR | |
Hersteller | Volterra Semiconductor | |
Logo | ||
Gesamt 30 Seiten PRELIMINARY
VT1115M CHIPSET
REVISION - December 30, 2004
PROGRAMMABLE OUTPUT, MULTIPHASE SWITCHING
REGULATOR WITH SMBus
Smart
Slave™
VT1105S
VT1125S
Input
Voltage
7V to
13.2V
Output
Voltage
0.600V to
1.600V
Current
Rating
25A per
Phase
VID
VRs
10.X, 11 &
Opteron™
GENERAL DESCRIPTION
Volterra’s fourth-generation chipset is a complete, integrated,
scalable architecture for the highest density multiphase
synchronous buck regulators. This ultra high density solu-
tion minimizes external components and offers enhanced
regulator performance, comprehensive control and reporting
features, ease of design and the smallest footprint available
for demanding multiphase synchronous buck converters. The
chipset is targeted for applications such as servers and net-
working systems.
The VT1115M master is part of the Volterra Generation 4
architecture as shown in Figure 1. Each VT1115M drives
and controls multiple Generation 4 Smart Slave™ integrated
output devices, such as the VT1105S and VT1125S. The
number of Generation 4 Smart Slaves™ can be set by design,
according to the application requirements. The desired slave
and load operating conditions are controlled by a desired
current command issued from the VT1115M to the slave
devices. Configuration and monitoring of the VR conditions
are controlled via an interconnecting bus between the master
and the slaves as shown in Figure 1.
The VT1115M supports the following voltage regulator speci-
fications: Intel® VR 10 and extended VR 10, AMD Opteron™
and Intel® VR 11.
The architecture incorporates a SMBus interface for monitor-
ing and control of the voltage regulator. Regulator parameters
can be set and monitored via the two-way SMBus for control,
protection and shutdown of the regulator. The SMBus can
provide a reading of faults such as VX short-circuit or slave
over-temperature, so that the regulator can be controlled and
protected during all operating conditions. The SMBus can
also provide temperature readings of individual slaves.
A key benefit of the architecture is that it provides excellent
scalability by increasing the number of slaves per system.
This flexibility allows the designer to trade-off cost and perfor-
mance for a given application using one VT1115M controller
and different slave configurations with no redesign or re-layout.
The number of phases and output current requirement can
be determined by the designer and easily populated or de-
populated to meet different load and performance targets.
KEY FEATURES
• Smallest Footprint: Typical Solution Occupies Less
than 1600mm2 in a 150A VRM Application
• Lowest Profile: 5mm Maximum Height
• Highest Accuracy Current Sharing
• Up to 25A/Phase Output – Programmable
• Differential Voltage Sense at Point of Load
• Scalable Output Current: Up to 8 Slaves
• SMBus Interface
• Output Status Reporting and Shutdown
• Slave Temperature Reporting
• Factory Set Presets for High Performance Design
• Switching Frequency: 500kHz-1.5MHz
• 8-Bit VID Input, with 6.25mV Steps and Setpoint
Trim for Programmable VOUT
– Intel® VR 10.X: 0.83125V-1.60V
– Intel® Extended (7-Bit) VR 10.X
– Intel® VR 11: 0.6V-1.60V
– AMD Opteron™: 0.80V-1.55V
• Dynamic VID
• Programmable Setpoint and Droop
• Programmable VR_HOT and VR_FAN Functions
• Programmable OVP, OVLO and UVLO
• Cycle-by-Cycle Current Limiting
• Power Good, OVP, Fault Flags and Output Enable
• Redundant Inputs for Power Good and OVP
SYSTEMS
• Servers and Workstations
• Enterprise Storage
• Broadband Communication
• Networking
• Small Form Factor Desktops
APPLICATIONS
Voltage Regulator Modules (VRMs) and On-Board
Regulators (VR Down)
• Microprocessors (µP): 32 and 64 Bit I/A and RISC
Architectures
• Memory
• Graphics Processors
• Network, Chipset ICs
TYPICAL APPLICATION CIRCUIT
3.3V
SMBus
VT1115M
Master
Digital
Control Bus
3.3V 12V
VT11x5S VX1
Slave 1
LOUT1
3.3V 12V
VT11x5S VX2
Slave 2
LOUT2
COUT
VOUT
Output voltage, switching frequency, current per slave,
setpoint, droop, over- and undervoltage protection levels and
many other voltage regulator parameters are all programmed
easily on the VT1115M controller and communicated to the
slaves via a bus between master and slaves.
Volterra Semiconductor Corp. Proprietary. Do Not Copy. Do Not Distribute.
3.3V 12V
VT11x5S VXN
Slave N
LOUTN
Figure 1. VT1115M System Architecture
1
VT1115M CHIPSET PRELIMINARY
PROPRIETARY AND CONFIDENTIAL
PROGRAMMABLE OUTPUT, MULTIPHASE SWITCHING REGULATOR WITH SMBus
TYPICAL OPERATING CHARACTERISTICS
Figure 2. Output Switching Nodes - Eight Slaves
Switching Out-of-Phase (Slaves 1-4)
Figure 3. Output Switching Nodes - Eight Slaves
Switching Out-of-Phase (Slaves 5-8)
Time/Div: 200ns
Conditions: VOUT = 1.2V, No Load
1: Vx Switching Node for Slave #1 (10V/div)
2: Vx Switching Node for Slave #2 (10V/div)
3: Vx Switching Node for Slave #3 (10V/div)
4: Vx Switching Node for Slave #4 (10V/div)
Figure 4. Load Transient Response - 6 Slave
VT1105S System
∆: 175mV
Time/Div: 200ns
Conditions: VOUT = 1.2V, No Load
1: Vx Switching Node for Slave #5 (10V/div)
2: Vx Switching Node for Slave #6 (10V/div)
3: Vx Switching Node for Slave #7 (10V/div)
4: Vx Switching Node for Slave #8 (10V/div)
(Triggered From Slave #1)
Figure 5. Output Voltage Overshoot - 6 Slave
VT1105S System
∆: 155mV
Time/Div: 20µs
Conditions: VOUT = 1.2V
IOUT = 100A-0A Load Step
Slew Rate > 1000A/µs
COUT = 58 x 22µF
1: Output Voltage (100mV/div)
6 Volterra Semiconductor Corp. Proprietary. Do Not Copy. Do Not Distribute.
Time/Div: 5µs
Conditions: VOUT = 1.2V
IOUT = 100A-0A Load Step
Loadline = 1.25mΩ
COUT = 58 x 22µF
1: Output Voltage (100mV/div)
REVISED - 12/30/04
6 Page VT1115M CHIPSET PRELIMINARY
PROPRIETARY AND CONFIDENTIAL
PROGRAMMABLE OUTPUT, MULTIPHASE SWITCHING REGULATOR WITH SMBus
VT1105S (CSP-52) PINOUT
123456
A
BST
VDDH VDDH VDDH VDDH VDDH
B
VX VX VX VX VX VX
C
VSS
VSS
VSS
VSS
VSS
VSS
D
VX VX VX VX VX VX
E
VSS
VSS
VSS
VSS
VSS
VSS
F
VX VX VX VX VX VX
G
VSS
VSS
VSS
VSS
VSS
VSS
H
VCC
VDD
GND SPHASE
J
VDD IDES_N IDES_P GND DBI DBO
6 5 4 3 21
A
VDDH
VDDH
VDDH
VDDH
VDDH
BST
B
VX VX VX VX VX VX
C
VSS
VSS
VSS
VSS
VSS
VSS
D
VX VX VX VX VX VX
E
VSS
VSS
VSS
VSS
VSS
VSS
F
VX VX VX VX VX VX
G
VSS
VSS
VSS
VSS
VSS
VSS
H
SPHASE
GND
VDD
VCC
J
DBO DBI GND IDES_P IDES_N VDD
Top View
Bottom View-Ball Side Up
PIN INFORMATION FOR VT1105S SMART
SLAVE™
BST (Ball A1): Bootstrap supply for high side drivers.
VDDH (Balls A2-A6): 12V input supply voltage node. These
balls connect to the 12V input power supply source.
VX (Balls B1-B6, D1-D6, F1-F6): Switching node. These
balls connect the switching node of the power devices to
the output inductor.
VSS (Balls C1-C6, E1-E6, G1-G6): Power FETs ground node.
These balls connect directly to the ground plane.
VCC (Ball H1): 3.3V supply for low side drivers.
VDD (Balls H2, J1): 3.3V supply for control circuits.
GND (Balls H5, J4): Ground for control circuits.
SPHASE (Ball H6): SPHASE clock input from VT1115M
master controller.
IDES_N (Ball J2): Negative input side of differential desired
current signal.
IDES_P (Ball J3): Positive input side of differential desired
current signal.
DBI (Ball J5): Digital control bus input.
DBO (Ball J6): Digital control bus output.
12 Volterra Semiconductor Corp. Proprietary. Do Not Copy. Do Not Distribute.
REVISED - 12/30/04
12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ VT1115M Schematic.PDF ] |
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