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RM0016 Schematic ( PDF Datasheet ) - STMicroelectronics

Teilenummer RM0016
Beschreibung STM8S and STM8AF microcontroller families
Hersteller STMicroelectronics
Logo STMicroelectronics Logo 




Gesamt 30 Seiten
RM0016 Datasheet, Funktion
RM0016
Reference manual
STM8S and STM8AF microcontroller families
Introduction
This reference manual provides complete information for application developers on how to
use STM8S and STM8AF microcontroller memory and peripherals.
The STM8AF is a family of microcontrollers designed for automotive applications, with
different memory densities, packages and peripherals:
The low density STM8AF devices are the STM8AF6223/26 with 8 Kbytes of Flash
memory.
The medium density STM8AF devices are the STM8AF624x, STM8AF6266/68,
STM8AF612x/4x and STM8AF6166/68 microcontrollers with 16 to 32 Kbytes of Flash
memory.
The high density STM8AF devices are the STM8AF52xx STM8AF6269/8x/Ax,
STM8AF51xx, and STM8AF6178/99/9A microcontrollers with 32 to 128 Kbytes of Flash
memory.
The STM8S is a family of microcontrollers designed for general purpose applications, with
different memory densities, packages and peripherals.
The value line low density STM8S devices are the STM8S003xx microcontrollers with 8
Kbytes of Flash memory.
The value line medium density STM8S devices are the STM8S005xx microcontrollers
with 32 Kbytes of Flash memory.
The value line high density STM8S devices are the STM8S007xx microcontrollers with 64
Kbytes of Flash memory.
The access line low density STM8S devices are the STM8S103xx and STM8S903xx
microcontrollers with 8 Kbytes of Flash memory.
The access line medium density STM8S devices are the STM8S105xx microcontrollers
with 16 to 32-Kbytes of Flash memory.
The performance line high density STM8S devices are the STM8S207xx and
STM8S208xx microcontrollers with 32 to 128 Kbytes of Flash memory.
Refer to the product datasheet for ordering information, pin description, mechanical and
electrical device characteristics, and for the complete list of available peripherals.
Reference documents
For information on programming, erasing and protection of the internal Flash memory
please refer to the STM8S and STM8AF Flash programming manual (PM0051), and to
the STM8 SWIM communication protocol and debug module user manual (UM0470).
For information on the STM8 core, refer to STM8 CPU programming manual (PM0044).
The bootloader user manual (UM0560) describes the usage of the integrated ROM
bootloader.
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RM0016 Datasheet, Funktion
Contents
RM0016
11.6
11.7
11.8
11.9
Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Input mode details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
11.7.1 Alternate function input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
11.7.2 Interrupt capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
11.7.3 Analog channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
11.7.4 Schmitt trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Output mode details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .111
11.8.1 Alternate function output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
11.8.2 Slope control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
GPIO registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
11.9.1 Port x output data register (Px_ODR) . . . . . . . . . . . . . . . . . . . . . . . . . 112
11.9.2 Port x pin input register (Px_IDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
11.9.3 Port x data direction register (Px_DDR) . . . . . . . . . . . . . . . . . . . . . . . 113
11.9.4 Port x control register 1 (Px_CR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
11.9.5 Port x control register 2 (Px_CR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
11.9.6 GPIO register map and reset values . . . . . . . . . . . . . . . . . . . . . . . . . . 114
12 Auto-wakeup (AWU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
12.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
12.2 LSI clock measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
12.3 AWU functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
12.3.1 AWU operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
12.3.2 Time base selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
12.3.3 LSI clock frequency measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
12.4 AWU registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
12.4.1 Control/status register (AWU_CSR) . . . . . . . . . . . . . . . . . . . . . . . . . . 119
12.4.2 Asynchronous prescaler register (AWU_APR) . . . . . . . . . . . . . . . . . . 119
12.4.3 Timebase selection register (AWU_TBR) . . . . . . . . . . . . . . . . . . . . . . 120
12.4.4 AWU register map and reset values . . . . . . . . . . . . . . . . . . . . . . . . . . 120
13 Beeper (BEEP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
13.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
13.2 Beeper functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
13.2.1 Beeper operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
13.2.2 Beeper calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
13.3 Beeper registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
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RM0016 pdf, datenblatt
Contents
RM0016
21.5
21.6
21.7
21.4.3 Error conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 298
21.4.4 SDA/SCL line control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 299
I2C low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
I2C interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
I2C registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 302
21.7.1 Control register 1 (I2C_CR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 302
21.7.2 Control register 2 (I2C_CR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303
21.7.3 Frequency register (I2C_FREQR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 305
21.7.4 Own address register LSB (I2C_OARL) . . . . . . . . . . . . . . . . . . . . . . . 306
21.7.5 Own address register MSB (I2C_OARH) . . . . . . . . . . . . . . . . . . . . . . 306
21.7.6 Data register (I2C_DR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 306
21.7.7 Status register 1 (I2C_SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 308
21.7.8 Status register 2 (I2C_SR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
21.7.9 Status register 3 (I2C_SR3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311
21.7.10 Interrupt register (I2C_ITR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312
21.7.11 Clock control register low (I2C_CCRL) . . . . . . . . . . . . . . . . . . . . . . . . 313
21.7.12 Clock control register high (I2C_CCRH) . . . . . . . . . . . . . . . . . . . . . . . 314
21.7.13 TRISE register (I2C_TRISER) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
21.7.14 I2C register map and reset values . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
22 Universal asynchronous receiver transmitter (UART) . . . . . . . . . . . . 318
22.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318
22.2 UART main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
22.3 UART functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
22.3.1 UART character description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
22.3.2 Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
22.3.3 Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
22.3.4 High precision baud rate generator . . . . . . . . . . . . . . . . . . . . . . . . . . . 333
22.3.5 Clock deviation tolerance of the UART receiver . . . . . . . . . . . . . . . . . 334
22.3.6 Parity control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 335
22.3.7 Multi-processor communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 336
22.3.8 LIN (local interconnection network) mode . . . . . . . . . . . . . . . . . . . . . . 337
22.3.9 UART synchronous communication . . . . . . . . . . . . . . . . . . . . . . . . . . . 338
22.3.10 Single wire half duplex communication . . . . . . . . . . . . . . . . . . . . . . . . 340
22.3.11 Smartcard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 340
22.3.12 IrDA SIR ENDEC block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 342
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