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HCPL-0452 Schematic ( PDF Datasheet ) - Avago

Teilenummer HCPL-0452
Beschreibung High Speed Optocouplers
Hersteller Avago
Logo Avago Logo 




Gesamt 16 Seiten
HCPL-0452 Datasheet, Funktion
HCNW4502/3
HCPL-0452/0453/4502/4503
Single Channel, High Speed Optocouplers
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
These diode-transistor optoc­ oup­lers use an insulating
layer between a LED and an integrated photodetector to
provide elec­trical in­su­lation between input and out­put.
Separate connections for the photodiode bias and out-
put-transistor collector increase the speed up to a hun-
dred times that of a conven­tional phototransistor coupler
by reduci­ng the base-collector capacitance.
These single channel optocoup­lers are available in
8-Pin DIP­, SO-8 and Widebody package configurations.
The HCPL-4502/4503 and HCNW4502/4503 are designed
for high speed TTL/TTL applications. A standard 16 mA TTL
sink current through the input LED will provide enough
output current for 1 TTL load and a 5.6 kΩ pull-up resistor.
CTR for these devices is 19% minimum at IF = 16 mA.
Functional Diagram
NC 1
ANODE 2
CATHODE 3
NC 4
8 VCC
7 NC
6 Vo
5 GND
TRUTH TABLE
(POSITIVE LOGIC)
LED Vo
ON LOW
OFF HIGH
A 0.1 µF bypass capacitor must be connected between pins 5 and 8.
Features
15 kV/µs minimum common mode transient
immunity at VCM = 1500 V
High speed: 1 Mb/s
TTL compatible
Available in 8-Pin DIP, SO-8, widebody packages
Open collector output
Guaranteed performance from temperature:
0°C to 70°C
Safety approval
UL Recognized – 3750 Vrms for 1 minute (5000 Vrms
for 1 minute for HCNW and Option 020 devices)
per UL1577
CSA Approved
IEC/EN/DIN EN 60747-5-2 Approved
  – VIORM = 630 V peak for HCPL-4503#060
  – VIORM = 1414 V peak for HCNW devices
Dual channel version available (4534/0534)
MIL-PRF-38534 hermetic version available
(55XX/65XX/4N55)
Applications
High voltage insulation
Video signal isolation
Power transistor isolation in motor drives
Line receivers
Feedback element in switched mode power supplies
High speed logic ground isolation
– TTL/TTL, TTL/CMOS, TTL/LSTTL
Replaces pulse transformers
Replaces slow phototransistor isolators
Analog signal ground isolation
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.






HCPL-0452 Datasheet, Funktion
8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300 (HCNW4502/3)
11.15 ± 0.15
(0.442 ± 0.006)
87 6 5
LAND PATTERN RECOMMENDATION
9.00 ± 0.15
(0.354 ± 0.006)
13.56
(0.534)
1234
1.55
(0.061)
MAX.
4.00
(0.158)
MAX.
1.3
(0.051)
2.29
(0.09)
12.30 ± 0.30
(0.484 ± 0.012)
11.00
(0.433)
MAX.
1.78 ± 0.15
(0.070 ± 0.006)
2.54
(0.100)
BSC
0.75 ± 0.25
(0.030 ± 0.010)
1.00 ± 0.15
(0.039 ± 0.006)
Dimensions in millimeters (inches).
Lead coplanarity = 0.10 mm (0.004 inches).
Note: Floating lead protrusion is 0.25 mm (10 mils) max.
0.254
+ 0.076
- 0.0051
(0.010
+ 0.003)
- 0.002)
7° NOM.
Solder Reflow Temperature Profile
300
200
100
ROOM
TEMPERATURE
00
PREHEATING RATE
3°C + 1°C/–0.5°C/SEC.
REFLOW HEATING RATE
2.5°C ± 0.5°C/SEC.
PEAK
TEMP.
245°C
2.5 C ± 0.5°C/SEC.
160°C
150°C
140°C 3°C + 1°C/–0.5°C
PREHEATING TIME
150°C, 90 + 30 SEC.
30
SEC.
30
SEC.
50 100 150
TIME (SECONDS)
PEAK
TEMP.
240°C
PEAK
TEMP.
230°C
SOLDERING
TIME
200°C
50 SEC.
200
TIGHT
TYPICAL
LOOSE
250
Note: Non-halide flux should be used.
6

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HCPL-0452 pdf, datenblatt
Package Characteristics
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specified.
Parameter
Sym. Device
Min. Typ.* Max. Units Test Conditions
Fig.
Input-Output
VISO
Momentary
Withstand
Voltage**
8-Pin DIP
3750
V rms
SO-8
Widebody
5000
RH < 50%,
t = 1 min.,
TA = 25°C
8-Pin DIP
5000
(Option 020)
II-O 8-Pin DIP
1 µA
Input-Output
RI-O
Resistance
8-Pin DIP
SO-8
1012 Ω
45% RH, t = 5 s,
VI-O = 3 kVdc,
TA = 25°C
VI-O = 500 Vdc
Widebody
1012 1013
1011
Input-Output
CI-O
Capacitance
8-Pin DIP
SO-8
0.6
pF
TA = 25°C
TA = 100°C
f = 1 MHz
Widebody
0.5 0.6
Note
6, 11
6, 12
6, 9,
12
6, 13
6
6
*All typicals at TA = 25°C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics Table (if applicable), your
equipment level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage,” publication num-
ber 5963-2203E.
Notes:
  1.  Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C (SO-8).
  2.  Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C (SO-8).
  3.  Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 1.1 mW/°C (SO-8).
  4.  Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 2.3 mW/°C (SO-8).
  5.  CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100.
  6.  Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
  7.  Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common
mode pulse signal, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a
Logic Low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the
output will remain in a Logic Low state (i.e., VO < 0.8 V).
  8.  The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and the 5.6 kΩ pull-up resistor.
  9.  See Option 020 data sheet for more information.
10.  Use of a 0.1 µf bypass capacitor connected between pins 5 and 8 is recommended.
11.  In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (leakage
detection current limit, II-O ≤ 5 µA). This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-2 Insulation
Related Characteristics Table if applicable.
12.  In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (leakage
detection current limit, II-O ≤ 5 µA). This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-2 Insulation
Related Characteristics Table if applicable.
13.  This rating is equally validated by an equivalent ac proof test.
12

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