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Teilenummer | A3S56D40GTP |
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Beschreibung | 256M Double Data Rate Synchronous DRAM | |
Hersteller | Zentel | |
Logo | ||
Gesamt 30 Seiten A3S56D30GTP
A3S56D40GTP
256M Double Data Rate Synchronous DRAM
256Mb DDR SDRAM Specification
A3S56D30GTP
A3S56D40GTP
Zentel Electronics Corp.
Revision 1.1
Jul., 2013
Block Diagram
A3S56D40GTP
DLL
A3S56D30GTP
A3S56D40GTP
256M Double Data Rate Synchronous DRAM
DQ0 - 15
UDQS, LDQS
I/O Buffer
DQS Buffer
Memory
Array
Bank #0
Memory
Array
Bank #1
Memory
Array
Bank #2
Memory
Array
Bank #3
Mode Register
Control Circuitry
Address Buffer
A0-12 BA0,1
Clock Buffer
Control Signal Buffer
/CS /RAS /CAS /WE UDM,
CLK /CLK CKE
LDM
Type Designation Code
A 3 S 56 D 4 0G TP - 50
This rule is applied to only Synchronous DRAM family.
Speed
50: 200MHz@CL=3, 166MHz@CL=2.5, and 133MHz@CL=2
Package Type
TP: TSOP II
Die Version
0G: Version 0G
I/O Configuration 4: x 16
Classification
D: DDR Synchronous DRAM
Density
56: 256Mb
Interface
S: SSTL_2
Product Line
3: DRAM
Zentel Memory
Revision 1.1
Page 5 / 40
Jul., 2013
6 Page A3S56D30GTP
A3S56D40GTP
256M Double Data Rate Synchronous DRAM
Function Truth Table (continued)
Current State /CS /RAS /CAS /WE Address
PRE-CHARGING H X X X X
L H H HX
L H H L BA
L H L X BA, CA, A10
L L H H BA, RA
L L H L BA, A10
L L L HX
LL
L
L
Op-Code,
Mode-Add
ROW
H X X XX
ACTIVATING L H H H X
L H H L BA
L H L X BA, CA, A10
L L H H BA, RA
L L H L BA, A10
L L L HX
WRITE RE-
COVERING
LL
HX
LH
L
L
Op-Code,
Mode-Add
X XX
H HX
L H H L BA
L H L X BA, CA, A10
L L H H BA, RA
L L H L BA, A10
L L L HX
LL
L
L
Op-Code,
Mode-Add
Command
DESEL
NOP
TERM
READ / WRITE
ACT
PRE / PREA
REFA
Action
NOP (Idle after tRP)
NOP (Idle after tRP)
ILLEGAL
ILLEGAL
ILLEGAL
NOP (Idle after tRP)
ILLEGAL
MRS ILLEGAL
DESEL
NOP
TERM
READ / WRITE
ACT
PRE / PREA
REFA
NOP (Row Active after tRCD)
NOP (Row Active after tRCD)
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
MRS ILLEGAL
DESEL
NOP
TERM
READ / WRITE
ACT
PRE / PREA
REFA
NOP
NOP
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
MRS ILLEGAL
Notes
2
2
2
4
2
2
2
2
2
2
2
2
Revision 1.1
Page 11 / 40
Jul., 2013
12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ A3S56D40GTP Schematic.PDF ] |
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