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PDF NB3N511 Data sheet ( Hoja de datos )
| Número de pieza | NB3N511 | |
| Descripción | 3.3V / 5.0V 14MHz to 200MHz PLL Clock Multiplier | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NB3N511
3.3V / 5.0V 14 MHz to
200 MHz PLL Clock
Multiplier
Description
The NB3N511 is a clock multiplier that will generate one of nine
selectable output multiples of an input frequency via two 3−level
select inputs (S0, S1). It accepts a standard fundamental mode crystal
or an external reference clock signal. Phase−Locked−Loop (PLL)
design techniques are used to produce a low jitter, TTL level clock
output up to 200 MHz with a 50% duty cycle. An Output Enable (OE)
pin is provided, and when asserted low, the clock output goes into
tri−state (high impedance). The NB3N511 is commonly used in
electronic systems as a cost efficient replacement for crystal
oscillators
Features
• Clock Output Frequencies up to 200 MHz
• Nine Selectable Multipliers of the Input Frequency
• Operating Range: VDD = 3.3 V ±10% or 5.0 V ±5%
• Low Jitter Output of 25 ps One Sigma (rms)
• Zero ppm Clock Multiplication Error
• 45% − 55% Output Duty Cycle
• TTL/CMOS Output with 25 mA TTL Level Drive
• Crystal Reference Input Range of 5 − 32 MHz
• Input Clock Frequency Range of 1 − 50 MHz
• OE, Output Enable with Tri−State Output
• 8−Pin SOIC
• Industrial Temperature Range −40°C to +85°C
• These are Pb−Free Devices
VDD
http://onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAM
8
3N511
ALYWG
G
1
3N511
A
L
Y
W
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
crystal or
clock
CLX2 CLX1
X1/ICLK
Crystal
Oscillator
X2
Multiplier
Select
S1 S0
÷ P Phase
Detector
Charge
Pump
VCO
÷ M Feedback
GND Figure 1. NB3N511 Logic Diagram
TTL/
CMOS
Output
OE
CLKOUT
© Semiconductor Components Industries, LLC, 2013
November, 2013 − Rev. 4
1
Publication Order Number:
NB3N511/D
1 page  
NB3N511
APPLICATIONS INFORMATION
High Frequency CMOS/TTL Oscillators
The NB3N511, along with a low frequency fundamental
mode crystal, can build a high frequency TTL output
oscillator. For example, a 20 MHz crystal connected to the
NB3N511 with the 5X output selected (S1 = L, S0 = H)
produces an 100 MHz CMOS/TTL output clock.
Decoupling and External Components
The NB3N511 requires a 0.01 mF decoupling capacitor to
be connected between VDD and GND on pins 2 and 3. It must
be connected close to the NB3N511 to minimize lead
inductance. Control input pins can be connected to device
pins VDD or GND, or to the VDD and GND planes on the
board.
small capacitors from X1 to ground and from X2 to ground.
These capacitors are used to adjust the stray capacitance of
the board to match the nominally required crystal load
capacitance. Because load capacitance can only be
increased in this trimming process, it is important to keep
stray capacitance to a minimum by using very short PCB
traces (and no vias) between the crystal and device. Crystal
capacitors, if needed, must be connected from each of the
pins X1 and X2 to ground. The value (in pF) of these crystal
caps should equal (CL − 12 pF) * 2. In this equation, CL =
crystal load capacitance in pF. Example: For a crystal with
a 16 pF load capacitance, each crystal capacitor would be
8 pF [(16 − 12) x 2 = 8].
Series Termination Resistor
A 33 W terminating resistor can be used next to the CLK
pin for trace lengths over one inch.
Crystal Information
The crystal used should be a fundamental mode (do not
use third overtone), parallel resonant. Crystal load
capacitors should be connected from pins X1 to ground and
X2 to ground to optimize the frequency accuracy, See
Figure 1.
The total on chip capacitance is approximately 12 pF. A
parallel resonant, fundamental mode crystal should be used.
The device crystal connections should include pads for
Table 8. RECOMMENDED CRYSTAL PARAMETERS
Parameter
Value
Crystal Cut
Fundamental AT Cut
Resonance
Parallel Resonance
Load Capacitance
18 pF
Operating Range
−40 to +85°C
Shunt Capacitance
5 pF Max
Equivalent Series Resistance (ESR)
50 W Max
Correlation Drive Level
1.0 mW Max
ORDERING INFORMATION
Device
Package
Shipping†
NB3N511DG
SOIC−8
(Pb−Free)
98 Units / Rail
NB3N511DR2G
SOIC−8
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NB3N511.PDF ] | |
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