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PDF PH1330AL Data sheet ( Hoja de datos )
| Número de pieza | PH1330AL | |
| Descripción | N-channel MOSFET | |
| Fabricantes | NXP Semiconductors | |
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PH1330AL
N-channel 30 V 1.3 mΩ logic level MOSFET in LFPAK
Rev. 01 — 14 October 2009
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in LFPAK package qualified to 150 °C. This product is
designed for computing customers only
1.2 Features and benefits
Advanced TrenchMOS provides low
RDSon and low gate charge
High efficiency gains in switching
power convertors
Improved mechanical and thermal
characteristics
LFPAK provides maximum power
density in a Power SO8 package
1.3 Applications
For computing customers only
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C
ID drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1
Ptot total power
dissipation
Tmb = 25 °C; see Figure 2
Tj junction temperature
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
Dynamic characteristics
VGS = 10 V; Tj(init) = 25 °C;
ID = 100 A; Vsup ≤ 30 V;
RGS = 50 Ω; unclamped
QGD
QG(tot)
gate-drain charge
total gate charge
VGS = 4.5 V; ID = 25 A;
VDS = 12 V;
see Figure 13 and 14
Static characteristics
RDSon
drain-source
on-state resistance
VGS = 10 V; ID = 15 A;
Tj = 100 °C; see Figure 12
VGS = 10 V; ID = 15 A;
Tj = 25 °C; see Figure 17
[1] Continuous current is limited by package.
[1]
Min Typ Max Unit
- - 30 V
- - 100 A
- - 121 W
-55 -
150 °C
- - 383 mJ
- 9.3 - nC
- 46.6 - nC
- - 1.8 mΩ
- 1.04 1.3 mΩ
1 page  
NXP Semiconductors
PH1330AL
N-channel 30 V 1.3 mΩ logic level MOSFET in LFPAK
6. Characteristics
Table 6. Characteristics
Symbol Parameter
Static characteristics
V(BR)DSS drain-source
breakdown voltage
VGS(th)
gate-source threshold
voltage
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
RG gate resistance
Dynamic characteristics
QG(tot)
total gate charge
QGS
QGS(th)
QGS(th-pl)
QGD
gate-source charge
pre-threshold
gate-source charge
post-threshold
gate-source charge
gate-drain charge
VGS(pl)
Ciss
Coss
Crss
gate-source plateau
voltage
input capacitance
output capacitance
reverse transfer
capacitance
Conditions
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10 and 11
ID = 1 mA; VDS = VGS; Tj = 150 °C;
see Figure 10
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10
VDS = 30 V; VGS = 0 V; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 150 °C
VGS = 15 V; VDS = 0 V; Tj = 25 °C
VGS = -15 V; VDS = 0 V; Tj = 25 °C
VGS = 4.5 V; ID = 15 A; Tj = 25 °C;
see Figure 17
VGS = 10 V; ID = 15 A; Tj = 100 °C;
see Figure 12
VGS = 10 V; ID = 15 A; Tj = 150 °C;
see Figure 12
VGS = 10 V; ID = 15 A; Tj = 25 °C;
see Figure 17
ID = 25 A; VDS = 12 V; VGS = 10 V;
see Figure 13 and 14
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 25 A; VDS = 12 V; VGS = 4.5 V;
see Figure 13 and 14
ID = 25 A; VDS = 12 V; VGS = 4.5 V;
see Figure 13
ID = 25 A; VDS = 12 V; VGS = 4.5 V;
see Figure 13 and 14
VDS = 12 V; see Figure 13 and 14
VDS = 12 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 15
Min Typ Max Unit
30 - - V
27 - - V
1.3 1.7 2.15 V
0.65 - - V
- - 2.45 V
- - 1.5 µA
- - 500 µA
- - 100 nA
- - 100 nA
- 1.43 1.95 mΩ
- - 1.8 mΩ
- 1.9 2.8 mΩ
-
1.04 1.3
mΩ
- 0.89 - Ω
- 100 - nC
- 90 - nC
- 46.6 - nC
- 17.9 - nC
- 11 - nC
- 6.9 - nC
- 9.3 - nC
- 2.53 - V
- 6227 - pF
- 1415 - pF
- 619 - pF
PH1330AL_1
Product data sheet
Rev. 01 — 14 October 2009
© NXP B.V. 2009. All rights reserved.
5 of 13
5 Page 
NXP Semiconductors
PH1330AL
N-channel 30 V 1.3 mΩ logic level MOSFET in LFPAK
8. Revision history
Table 7. Revision history
Document ID
Release date
PH1330AL_1
20091014
Data sheet status
Product data sheet
Change notice
-
Supersedes
-
PH1330AL_1
Product data sheet
Rev. 01 — 14 October 2009
© NXP B.V. 2009. All rights reserved.
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