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MC34071A Schematic ( PDF Datasheet ) - ON Semiconductor

Teilenummer MC34071A
Beschreibung Single Supply 3.0 V to 44 V Operational Amplifiers
Hersteller ON Semiconductor
Logo ON Semiconductor Logo 




Gesamt 26 Seiten
MC34071A Datasheet, Funktion
MC34071,2,4,A
MC33071,2,4,A,
NCV33072,4,A
Single Supply 3.0 V to 44 V
Operational Amplifiers
Quality bipolar fabrication with innovative design concepts are
employed for the MC33071/72/74, MC34071/72/74, NCV33072/74A
series of monolithic operational amplifiers. This series of operational
amplifiers offer 4.5 MHz of gain bandwidth product, 13 V/ms slew rate
and fast settling time without the use of JFET device technology.
Although this series can be operated from split supplies, it is
particularly suited for single supply operation, since the common
mode input voltage range includes ground potential (VEE). With a
Darlington input stage, this series exhibits high input resistance, low
input offset voltage and high gain. The all NPN output stage,
characterized by no deadband crossover distortion and large output
voltage swing, provides high capacitance drive capability, excellent
phase and gain margins, low open loop high frequency output
impedance and symmetrical source/sink AC frequency response.
The MC33071/72/74, MC34071/72/74, NCV33072/74,A series of
devices are available in standard or prime performance (A Suffix)
grades and are specified over the commercial, industrial/vehicular or
military temperature ranges. The complete series of single, dual and
quad operational amplifiers are available in plastic DIP, SOIC, QFN
and TSSOP surface mount packages.
Features
Wide Bandwidth: 4.5 MHz
High Slew Rate: 13 V/ms
Fast Settling Time: 1.1 ms to 0.1%
Wide Single Supply Operation: 3.0 V to 44 V
Wide Input Common Mode Voltage Range: Includes Ground (VEE)
Low Input Offset Voltage: 3.0 mV Maximum (A Suffix)
Large Output Voltage Swing: −14.7 V to +14 V (with ±15 V
Supplies)
Large Capacitance Drive Capability: 0 pF to 10,000 pF
Low Total Harmonic Distortion: 0.02%
Excellent Phase Margin: 60°
Excellent Gain Margin: 12 dB
Output Short Circuit Protection
ESD Diodes/Clamps Provide Input Protection for Dual and Quad
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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8
1
8
1
PDIP−8
P SUFFIX
CASE 626
SOIC−8
D SUFFIX
CASE 751
WQFN10
MT SUFFIX
CASE 510AJ
14
1
14
1
PDIP−14
P SUFFIX
CASE 646
SOIC−14
D SUFFIX
CASE 751A
14
1
TSSOP−14
DTB SUFFIX
CASE 948G
ORDERING INFORMATION
See detailed ordering and shipping information on page 18 of
this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 21 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 22
1
Publication Order Number:
MC34071/D






MC34071A Datasheet, Funktion
MC34071,2,4,A MC33071,2,4,A, NCV33072,4,A
2400
2000
1600
SOIC-14 Pkg 8 & 14 Pin Plastic Pkg
1200
800
SOIC-8 Pkg
400
0
-55 -40 -20
0 20 40 60 80 100 120 140 160
TA, AMBIENT TEMPERATURE (°C)
Figure 4. Maximum Power Dissipation versus
Temperature for Package Types
4.0 VCC = +15 V
VEE = -15 V
VCM = 0
2.0
0
-2.0
-4.0
-55
-25 0 25 50 75 100
TA, AMBIENT TEMPERATURE (°C)
Figure 5. Input Offset Voltage versus
Temperature for Representative Units
125
VCC
VCC -0.8
VCC VCC/VEE = +1.5 V/ -1.5 V to +22 V/ -22 V
VCC -1.6
VCC -2.4
VEE +0.01
VEE
-55
VEE
-25 0
25 50 75 100 125
TA, AMBIENT TEMPERATURE (°C)
Figure 6. Input Common Mode Voltage
Range versus Temperature
1.3
VCC = +15 V
1.2 VEE = -15 V
VCM = 0
1.1
1.0
0.9
0.8
0.7
-55
-25 0 25 50 75
TA, AMBIENT TEMPERATURE (°C)
100
125
Figure 7. Normalized Input Bias Current
versus Temperature
1.4
VCC = +15 V
VEE = -15 V
1.2 TA = 25°C
1.0
0.8
0.6
-12
-8.0 -4.0
0
4.0 8.0
VIC, INPUT COMMON MODE VOLTAGE (V)
12
Figure 8. Normalized Input Bias Current versus
Input Common Mode Voltage
50
RL Connected
40 to Ground TA = 25°C
30
RL = 10 k
RL = 2.0 k
20
10
0
0 5.0 10 15 20 25
VCC, |VEE|, SUPPLY VOLTAGE (V)
Figure 9. Split Supply Output Voltage
Swing versus Supply Voltage
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MC34071A pdf, datenblatt
MC34071,2,4,A MC33071,2,4,A, NCV33072,4,A
values of feedback resistances (lower current DACs). This
input pole can be compensated for by creating a feedback
zero with a capacitance across the feedback resistance, if
necessary, to reduce overshoot. For 2.0 kW of feedback
resistance, the MC34071 series can settle to within 1/2 LSB
of 8−bits in 1.0 ms, and within 1/2 LSB of 12−bits in 2.2 ms
for a 10 V step. In a inverting unity gain fast settling
configuration, the symmetrical slew rate is ±13 V/ms. In the
classic noninverting unity gain configuration, the output
positive slew rate is +10 V/ms, and the corresponding
negative slew rate will exceed the positive slew rate as a
function of the fall time of the input waveform.
Since the bipolar input device matching characteristics
are superior to that of JFETs, a low untrimmed maximum
offset voltage of 3.0 mV prime and 5.0 mV downgrade can
be economically offered with high frequency performance
characteristics. This combination is ideal for low cost
precision, high speed quad op amp applications.
The all NPN output stage, shown in its basic form on the
equivalent circuit schematic, offers unique advantages over
the more conventional NPN/PNP transistor Class AB output
stage. A 10 kW load resistance can swing within 1.0 V of the
positive rail (VCC), and within 0.3 V of the negative rail
(VEE), providing a 28.7 Vpp swing from ±15 V supplies.
This large output swing becomes most noticeable at lower
supply voltages.
The positive swing is limited by the saturation voltage of
the current source transistor Q7, and VBE of the NPN pull up
transistor Q17, and the voltage drop associated with the short
circuit resistance, R7. The negative swing is limited by the
saturation voltage of the pull−down transistor Q16, the
voltage drop ILR6, and the voltage drop associated with
resistance R7, where IL is the sink load current. For small
valued sink currents, the above voltage drops are negligible,
allowing the negative swing voltage to approach within
millivolts of VEE. For large valued sink currents (>5.0 mA),
diode D3 clamps the voltage across R6, thus limiting the
negative swing to the saturation voltage of Q16, plus the
forward diode drop of D3 (VEE +1.0 V). Thus for a given
supply voltage, unprecedented peak−to−peak output voltage
swing is possible as indicated by the output swing
specifications.
If the load resistance is referenced to VCC instead of
ground for single supply applications, the maximum
possible output swing can be achieved for a given supply
voltage. For light load currents, the load resistance will pull
the output to VCC during the positive swing and the output
will pull the load resistance near ground during the negative
swing. The load resistance value should be much less than
that of the feedback resistance to maximize pull up
capability.
Because the PNP output emitter−follower transistor has
been eliminated, the MC34071 series offers a 20 mA
minimum current sink capability, typically to an output
voltage of (VEE +1.8 V). In single supply applications the
output can directly source or sink base current from a
common emitter NPN transistor for fast high current
switching applications.
In addition, the all NPN transistor output stage is
inherently fast, contributing to the bipolar amplifier’s high
gain bandwidth product and fast settling capability. The
associated high frequency low output impedance (30 W typ
@ 1.0 MHz) allows capacitive drive capability from 0 pF to
10,000 pF without oscillation in the unity closed loop gain
configuration. The 60° phase margin and 12 dB gain margin
as well as the general gain and phase characteristics are
virtually independent of the source/sink output swing
conditions. This allows easier system phase compensation,
since output swing will not be a phase consideration. The
high frequency characteristics of the MC34071 series also
allow excellent high frequency active filter capability,
especially for low voltage single supply applications.
Although the single supply specifications is defined at
5.0 V, these amplifiers are functional to 3.0 V @ 25°C
although slight changes in parametrics such as bandwidth,
slew rate, and DC gain may occur.
If power to this integrated circuit is applied in reverse
polarity or if the IC is installed backwards in a socket, large
unlimited current surges will occur through the device that
may result in device destruction.
Special static precautions are not necessary for these
bipolar amplifiers since there are no MOS transistors on the
die.
As with most high frequency amplifiers, proper lead
dress, component placement, and PC board layout should be
exercised for optimum frequency performance. For
example, long unshielded input or output leads may result in
unwanted input−output coupling. In order to preserve the
relatively low input capacitance associated with these
amplifiers, resistors connected to the inputs should be
immediately adjacent to the input pin to minimize additional
stray input capacitance. This not only minimizes the input
pole for optimum frequency response, but also minimizes
extraneous “pick up” at this node. Supply decoupling with
adequate capacitance immediately adjacent to the supply pin
is also important, particularly over temperature, since many
types of decoupling capacitors exhibit great impedance
changes over temperature.
The output of any one amplifier is current limited and thus
protected from a direct short to ground. However, under
such conditions, it is important not to allow the device to
exceed the maximum junction temperature rating. Typically
for ±15 V supplies, any one output can be shorted
continuously to ground without exceeding the maximum
temperature rating.
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