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PDF FQD13N06TM Data sheet ( Hoja de datos )

Número de pieza FQD13N06TM
Descripción 60V N-Channel MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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FQD13N06
N-Channel QFET® MOSFET
60 V, 10 A, 140 mΩ
November 2013
Description
This N-Channel enhancement mode power MOSFET is
produced using Fairchild Semiconductor’s proprietary planar
stripe and DMOS technology. This advanced MOSFET
technology has been especially tailored to reduce on-state
resistance, and to provide superior switching performance
and high avalanche energy strength. These devices are
suitable for switched mode power supplies, active power
factor correction (PFC), and electronic lamp ballasts.
Features
10 A, 60 V, RDS(on) = 140 m(Max.) @ VGS = 10 V,
ID = 5.0 A
• Low Gate Charge (Typ. 5.8 nC)
• Low Crss (Typ. 15 pF)
• 100% Avalanche Tested
D
G
S
D
D-PAK
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering,
1/8" from case for 5 seconds
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
FQD13N06TM
60
10
6.3
40
± 25
85
10
2.8
7.0
2.5
28
0.22
-55 to +150
300
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RJC
RJA
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max.
Thermal Resistance, Junction to Ambient (*1 in2 Pad of 2-oz Copper), Max.
FQD13N06TM
4.5
110
50
Unit
oC/W
©2000 Fairchild Semiconductor Corporation
FQD13N06 Rev. C1
1
www.fairchildsemi.com

1 page




FQD13N06TM pdf
Same Type
50KΩ as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
IG = co3nmsAt.
DUT
Charge
Figure 12. Gate Charge Test Circuit & Waveform
V10GVS
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
Figure 13. Resistive Switching Test Circuit & Waveforms
V1G0GVSS
tp
VDS
ID
RG
L
EAS = --21-- L IAS2
------B--V--D--S-S-------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
DUT
VDD
VDS (t)
t p Time
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2000 Fairchild Semiconductor Corporation
FQD13N06 Rev. C1
5
www.fairchildsemi.com

5 Page










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