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PDF SH68F093 Data sheet ( Hoja de datos )
| Número de pieza | SH68F093 | |
| Descripción | 8-Bit Microcontroller | |
| Fabricantes | Sino Wealth | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SH68F093 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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SH68F093
8-Bit Microcontroller
Features
CMOS technology for low power consumption
Power Supply
- DC-DC Input voltage ranges from 1.1V to 1.7V
(static voltage without load)
- Fixed DC-DC output voltage: 2.7V or 3.3V
- Built-in 1.8V regulator for Micro-Processor (µP)
8-bit CMOS Micro-Processor (µP) core
- Instruction set is fully compatible with standard 8051
Program Memory
- 16K Bytes Program Memory (flash ROM)
Data Memory
- 512-byte DATA Memory: internal 256-byte RAM and
external 256-byte RAM
Interrupts
- 8 vector interrupt structure: two external interrupt, two
base timer, resume Interrupt, wake-up Interrupt, OVL
interrupt, and SPI interrupt
- Two programmable priority levels
On-Chip programmable RC Oscillator
- System Clock: 8MHz/4MHz/2MHz/1MHz
- Wake-up Timer: 8MHz/4MHz/2MHz/1MHz @IDLE
mode
- Wake-up Timer: 32KHz/16KHz @Power down mode
Operation frequency: Programmable
Two 8-Bit auto-reloadable base timers
One programmable voltage comparator
Reset
- Hardware reset: Low-Voltage Reset, Power-on
reset, and External Reset
- Watch-dog Reset
- Resume Reset
General Purpose I/O
- Up to 20 Selectable GPIO on 28 pin SOP package
Master/Slave SPI serial interface
Package
- 28 pin SOP, CHIPFORM
General Description
SH68F093, an 8-bit micro-controller, is designed for the high-performance and low-power RF mouse application. The micro-
controller contains on-chip flash-type program 16K bytes ROM, internal 512 bytes RAM, two 8-bit base timers, a wake-up
timer, a watch-dog timer, a DC-DC converter, a 1.8V regulator for µP core, built-in 8MHz RC resonator, POR/LVR reset,
resume reset, programmable voltage comparator, and master/slave SPI interface.
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SH68F093
Functional Description
1. Memory
1.1. Memory Allocation
There are 16K bytes Program Memory and 512 bytes Data Memory.
1.2. Program Memory
SH68F093 embeds 16K Bytes (0000H - 3FFFH) on-chip program memory for program code. The flash program memory
provides electrical erasure and programming.
Note: The 0th sector (0000H - 03FFH) and the last 64 bytes for customer block (3FC0H - 3FFFH) are reserved and can’t be
used as program memory.
1.3. Data Memory
SH68F093 provides internal 256-byte RAM and external 256-byte RAM.
Internal Special Function Registers (SFR): There are 128 bytes SFR, which is the internal reserved memory for system
registers in the µP.
0xFFFF
0x4000
0x3FC0
Program Memory
(FLASH ROM)
RESERVED
64 Bytes (customer block)
16K Bytes Flash ROM
for
User's Code Segment
0x0000
0xFF
Data Memory
(Internal SRAM)
Upper 128 Bytes
(Indirect
Addressing Only)
Special Function
Register Area
(Direct Addressing
Only)
0x80
0x7F
Direct and Indirect
Addressing Area
0x20
0x1F
0x00
General Purpose
Registers
Low 128 Bytes
Direct and Indirect
Addressing Ares
0xFF
External Data Memory
256 Bytes External Ram
0x00
FIG. 1-1 SH68F093 Program/Data Memory Map
Note: SH68F093 provides traditional method for accessing of external RAM. Use MOVX A, @Ri or MOVX @Ri, A to access
256-byte external RAM.
5
5 Page 
SH68F093
4. Oscillator
SH68F093 has a built-in 8M RC resonator for system clock. The system clock can be selected as 8MHz, 4MHz, 2MHz, or
1MHz by Firmware. SH68F093 also has a built-in 32 KHz RC resonator to generate the wake-up timer clock source. The
wake up timer clock can be selected as 16 KHz, 32 KHz, or system clock (8MHz/4MHz/2MHz/1MHz) with disabled 32 KHz
RC resonator by firmware See the following table.
PD CLK_SEL
8M RC
Resonator
8MHz
divide circuit
/1 /2 /4 /8
SYS_CLK
To system clock
32K RC
Resonator
32KHz
divide
circuit
/1 /2
WKT_CLK
WKT_SEL
WKT_SEL
FIG.4-1 Programmable System Clock Diagram
To wake-up timer
0095H
B[7:6]
B[5:4]
Bit[3:0]
WKT_CON
WKT_
SEL[1:0]
CLK_
SEL[1:0]
WKT[3:0]
Initial Value
11b
11b
0000b
R/W
R/W
R/W
Wake-up Timer & Resume Reset Control Register
Wake-up timer clock source(TWKT_CLK) selection
00: Disable Wake-up Timer
01: 16KHz(In Power-down mode)
01: Disable Wake-up Timer (In IDLE & normal operation mode)
10: 32KHz(In Power-down mode)
10: Disable Wake-up Timer (In IDLE & normal operation mode)
11: System clock (in IDLE mode)
11: Disable Wake-up Timer (In Power-down & normal operation mode)
Reset source: Hardware reset or WDT reset
System clock Frequency selection
00: 1 MHz
01: 2 MHz
10: 4 MHz
11: 8 MHz
Reset source: Hardware reset or WDT reset
Wake up time
0000: Reserved
0001: 27×TWKT_CLK
0010: 28×TWKT_CLK
0011: 29×TWKT_CLK
0100: 210×TWKT_CLK
0101: 211×TWKT_CLK
0110: 212×TWKT_CLK
0111: 213×TWKT_CLK
1000: 214×TWKT_CLK
1001: 215×TWKT_CLK
1010: 216×TWKT_CLK
1011: 217×TWKT_CLK
1100: 218×TWKT_CLK
1101: 219×TWKT_CLK
1110: 220×TWKT_CLK
1111: 221×TWKT_CLK
Reset source: Hardware reset or WDT reset
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SH68F093.PDF ] | |
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