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PDF SH67L19A Data sheet ( Hoja de datos )
| Número de pieza | SH67L19A | |
| Descripción | 4K 4-bit Microcontroller | |
| Fabricantes | Sino Wealth | |
| Logotipo |  |
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SH67L19A
4K 4-bit Micro-controller with LCD Driver
Features
SH6610C-Based Single-Chip 4-bit Micro-Controller With
LCD Driver
ROM: 4K X 16bits
RAM: 303X 4bits
- 47 System control register
- 256 Data memory
- 228 bits LCD RAM
Operation voltage: 1.2V - 1.7V
24 CMOS Bi-directional I/O pads
4-Level stack (Including interrupts)
One 8-bit Auto Re-Loaded Timer/Counter
One 8-bit base timer
Warm-Up Timer
Powerful interrupt sources:
- External interrupts (Rising/falling edge)
- Timer0 interrupt
- Base timer interrupt
- PORTB & PORTC interrupts (Rising/falling edge)
Dual clock sources:
OSC:
- Crystal oscillator: 32.768kHz
- RC oscillator: 32kHz or 131kHz. (Code Option)
OSCX:
- Ceramic oscillator: 455kHz
- RC oscillator: 262kHz or 500kHz (400kHz - 600kHz)
(System Register Option)
Instruction cycle time (4/fOSC)
Two low power operation modes: HALT and STOP
Reset
- Built-in power-on reset (POR)
- Built-in watchdog timer (WDT) (Code Option)
- Reset pad low level/falling edge triggering (Code Option)
LCD driver:
- 38SEG X 6COM (1/6 duty, 1/3 bias)
- 38SEG X 5COM (1/5 duty, 1/3 bias)
- 38SEG X 4COM (1/4 duty, 1/3 bias)
- 38SEG X 3COM (1/3 duty, 1/2 bias)
Built-in 2-channel Programmable Sound Generator (PSG)
Built-in Alarm Generator
Built-in Electro-luminescent Light (EL-Light) driver
Built-in voltage Doubler and Tripler charge pump circuit
Built-in Resistor To Frequency Converter (RFC)
Bonding option for multi-code software
Single solar supply application
Available in CHIP FORM
General Description
SH67L19A is a single-chip 4-bit micro-controller. The device integrates a SH6610C CPU core, 4K mask ROM, RAM, timer,
PSG, alarm, RFC, EL-light, LCD driver, I/O ports. A dual-oscillator is built in the SH67L19A to enhance the total chip
performance. SH67L19A is suitable for calculator application
1 V2.0
1 page  
SH67L19A
Functional Descriptions
1. CPU
The CPU contains the following functional blocks: Program
Counter (PC), Arithmetic Logic Unit (ALU), Carry Flag (CY),
Accumulator, Table Branch Register, Data Pointer (INX, DPH,
DPM, and DPL) and Stacks.
1.1. PC
The PC is used for ROM addressing consisting of 12-bit:
Page Register (PC11), and Ripple Carry Counter (PC10,
PC9, PC8, PC7, PC6, PC5, PC4, PC3, PC2, PC1, PC0).
The program counter is loaded with data corresponding to
each instruction. The unconditional jump instruction (JMP)
can be set at 1-bit page register for higher than 2K.
The program counter can address only 4K program ROM.
(Refer to the ROM description).
1.2. ALU and CY
The ALU performs arithmetic and logic operations. The ALU
provides the following functions:
Binary addition/subtraction (ADC, ADCM, ADD, ADDM,
SBC, SBCM, SUB, SUBM, ADI, ADIM, SBI, SBIM)
Decimal adjustments for addition/subtraction (DAA, DAS)
Logic operations (AND, ANDM, EOR, EORM, OR, ORM,
ANDIM, EORIM, ORIM)
Decisions (BA0, BA1, BA2, BA3, BAZ, BNZ, BC, BNC)
Logic Shift (SHR)
The Carry Flag (CY) holds the ALU overflow that the
arithmetic operation generates. During an interrupt service or
CALL instruction, the carry flag is pushed into the stack and
recovered from the stack by the RTNI instruction. It is
unaffected by the RTNW instruction.
1.3. Accumulator (AC)
The accumulator is a 4-bit register holding the results of the
arithmetic logic unit. In conjunction with the ALU, data is
transferred between the accumulator and system register, or
data memory can be performed.
1.4. Table Branch Register (TBR)
Table Data can be stored in program memory and can be
referenced by using Table Branch (TJMP) and Return
Constant (RTNW) instructions. The TBR and AC are placed
by an offset address in program ROM. TJMP instruction
branch into address ((PC11 - PC8) X (28) + (TBR, AC)). The
address is determined by RTNW to return look-up value into
(TBR, AC). ROM code bit7 - bit4 is placed into TBR and
bit3-bit0 into AC.
1.5. Data Pointer
The Data Pointer can indirectly address data memory.
Pointer address is located in register DPH (3-bit), DPM (3-bit)
and DPL (4-bit). The addressing range is 000H--3FFH.
Pseudo index address (INX) is used to read or write Data
memory, then RAM address bit9 - bit0 which comes from
DPH, DPM and DPL.
1.6. Stack
The stack is a group of registers used to save the contents of
CY & PC (11-0) sequentially with each subroutine call or
interrupt. The MSB is saved for CY and it is organized into 13
bits X 4 levels. The stack is operated on a first-in, last-out
basis and returned sequentially to the PC by the return
instructions (RTNI/RTNW).
Note:
The stack nesting includes both subroutine calls and
interrupts requests. The maximum allowed for subroutine
calls and interrupts are 4 levels. If the number of calls and
interrupt requests exceeds 4, then the bottom of stack will be
shifted out, that program execution may enter an abnormal
state.
2. RAM
Built-in RAM contains general-purpose data memory and system register. Because of its static nature, the RAM can keep data
after the CPU enters STOP or HALT.
2.1. RAM Addressing
Data memory and system register can be accessed in one instruction by direct addressing. The following is the memory
allocation map:
System register: $000 - $01F, $269 - $26D, $360 - $368, $3C0 - $3C2
Data memory: $020 - $11F
LCD RAM space: $300 - $325, $330 - $355
RAM Bank Table:
Bank 0
B=0
$020 - $07F
Bank 1
B=1
$080 - $0FF
Bank 2
B=2
$100 - $17F
Bank 4
B=4
$200 - $27F
Bank 6
B=6
$300 - $37F
Bank 7
B=7
$380 - $3FF
Where, B: RAM bank bit use in instructions
5
5 Page 
SH67L19A
5.3. OSC Oscillator
The OSC generates the basic clock pulses that provide the CPU and peripherals (Timer0, Base timer, LCD) with an operating
clock.
(1) OSC Crystal Oscillator
(2) OSC RC Oscillator
OSCI
OSCO
C1
Crystal
C2
OSCI
ROSC
VDD
1000pF (for reference only)
External RC
Note: The ROSC value in 131kHz mode is the same as the
value in 32kHz mode.
5.4. OSCX Oscillator
OSCX has two clock oscillators. The system register selects the ceramic or RC as the CPU’s clock.
If the OSCX is not used, it must be selected as Ceramic resonator and the OSCXI must be connected to GND.
(1) OSCX RC Oscillator
(2) OSCX Ceramic Resonator
OSCXI
ROSCX
VDD
1000pF (for reference only)
External RC
OSCXI
OSCXO
C1
Ceramic
C2
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SH67L19A.PDF ] | |
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