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PDF SH66L16A Data sheet ( Hoja de datos )
| Número de pieza | SH66L16A | |
| Descripción | 16K 4-bit Low Power Micro-controller | |
| Fabricantes | Sino Wealth | |
| Logotipo |  |
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SH66L16A
16K 4-bit Low Power Micro-controller with LCD Driver
Features
SH6610C-based single-chip 4-bit micro-controller with
LCD driver
ROM: 16K X 16 bits
RAM: 2016 X 4 bits
- 32 System Control Register
- 1872 Data Memory
- 448 bits LCD RAM
Operation Voltage:
VDD = 1.2V - 1.7V (Typical 1.5V)
24 CMOS Bi-directional I/O Pins (including 12 shared with
SEG/COM pins)
4-Level Stack (Including Interrupts)
Powerful Interrupt Sources:
- External interrupt (Low active)
- Timer0 interrupt
- Base Timer interrupt
- PORTB & PORTC interrupts (Low active)
Oscillator (Code Option):
OSCX:
- RC oscillator:
200kHz
OSC:
- Crystal oscillator: 32.768kHz
Base timer clock source (Code Option):
OSC:
- Crystal Oscillator:
- RC oscillator:
OSCX:
- RC oscillator:
32.768kHz
32kHz
200kHz
Instruction Cycle Time (4/fOSC)
Two Low Power Operation Modes: HALT And STOP
Reset
- Built-in Watchdog Timer (WDT) (Code Option)
- Built-in Power-on Reset (POR)
- Built-in Low Voltage Reset (LVR) (Code Option)
LCD Driver:
56SEG X 4COM (1/4 Duty, 1/3 Bias)
56SEG X 8COM (1/8 Duty, 1/4 Bias)
Built-in Voltage Tripler Charge Pump Circuit
Built-in Alarm Generator
Low power consumption
Read Rom Data Table function (RDT)
Bonding option for multi-code software
Available in CHIP FORM
General Description
SH66L16A is a single-chip 4-bit micro-controller. This device integrates a SH6610C CPU core; RAM, ROM, Timer, Base Timer,
Alarm generator, LCD driver, I/O ports, and voltage tripler charge pump circuit. The SH66L16A is suitable for financial check
back calculator application.
1 V1.0
1 page  
SH66L16A
Functional Description
1. CPU
The CPU contains the following functional blocks:
Program Counter (PC), Arithmetic Logic Unit (ALU), Carry
Flag (CY), Accumulator, Table Branch Register, Data
Pointer (INX, DPH, DPM, and DPL) and Stacks.
1.1. PC
The PC is used for ROM addressing consisting of 12-bit:
Page Register (PC11), and Ripple Carry Counter (PC10,
PC9, PC8, PC7, PC6, PC5, PC4, PC3, PC2, PC1, PC0).
The program counter is loaded with data corresponding to
each instruction. The unconditional jump instruction (JMP)
can be set at 1-bit page register for higher than 2K.
The program counter can address only 4K program ROM.
(Refer to the ROM description).
1.2. ALU and CY
The ALU performs arithmetic and logic operations. The ALU
provides the following functions:
Binary addition/subtraction (ADC, ADCM, ADD, ADDM,
SBC, SBCM, SUB, SUBM, ADI, ADIM, SBI, SBIM)
Decimal adjustments for addition/subtraction (DAA, DAS)
Logic operations (AND, ANDM, EOR, EORM, OR, ORM,
ANDIM, EORIM, ORIM)
Decisions (BA0, BA1, BA2, BA3, BAZ, BNZ, BC, BNC)
Logic Shift (SHR)
The Carry Flag (CY) holds the ALU overflow that the
arithmetic operation generates. During an interrupt service or
CALL instruction, the carry flag is pushed into the stack and
recovered from the stack by the RTNI instruction. It is
unaffected by the RTNW instruction.
1.3. Accumulator (AC)
The accumulator is a 4-bit register holding the results of the
arithmetic logic unit. In conjunction with the ALU, data is
transferred between the accumulator and system register, or
data memory can be performed.
1.4 Table Branch Register (TBR)
Table Data can be stored in program memory and can be
referenced by using Table Branch (TJMP) and Return
Constant (RTNW) instructions. The TBR and AC are placed
by an offset address in program ROM. TJMP instruction
branch into address ((PC11 - PC8) X (28) + (TBR, AC)). The
address is determined by RTNW to return look-up value into
(TBR, AC). ROM code Bit7-Bit4 is placed into TBR and
Bit3-Bit0 into AC.
1.5. Data Pointer
The Data Pointer can indirectly address data memory.
Pointer address is located in register DPH (3-bit), DPM
(3-bit) and DPL (4-bit). The addressing range is
000H--3FFH. Pseudo index address (INX) is used to read or
write Data memory, then RAM address Bit9 - Bit0 which
comes from DPH, DPM and DPL.
1.6. Stack
The stack is a group of registers used to save the contents of
CY & PC (11-0) sequentially with each subroutine call or
interrupt. The MSB is saved for CY and it is organized into 13
bits X 4 levels. The stack is operated on a first-in, last-out
basis and returned sequentially to the PC by the return
instructions (RTNI/RTNW).
Note:
The stack nesting includes both subroutine calls and
interrupts requests. The maximum allowed for subroutine
calls and interrupts are 4 levels. If the number of calls and
interrupt requests exceeds 4, then the bottom of stack will be
shifted out, that program execution may enter an abnormal
state.
2. RAM
Built-in RAM contains general-purpose data memory and system register. Because of its static nature, the RAM can keep data
after the CPU entering STOP or HALT.
2.1. RAM Addressing
Data memory and system register can be accessed in one instruction by direct addressing. The following is the memory
allocation map:
System register: $000 - $01F
Data memory: $020 - $2FF, $370 - $3FF & $420 - $7FF (1872 X 4 bits, divided into 16 banks)
LCD RAM space: $300 - $36F (112 X 4 bits)
RAM Bank Table: (RAMB: System Register $14 bit3)
Bank 0
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
Bank 6
Bank 7
RAMB=0, B=0 RAMB=0, B=1 RAMB=0, B=2 RAMB=0, B=3 RAMB=0, B=4 RAMB=0, B=5 RAMB=0, B=6 RAMB=0, B=7
$020 - $07F $080 - $0FF $100 - $17F $180 - $1FF $200 - $27F $280 - $2FF $300 - $37F $380 - $3FF
Bank 8
Bank 9
Bank 10
Bank 11
Bank 12
Bank 13
Bank 14
Bank 15
RAMB=1, B=0 RAMB=1, B=1 RAMB=1, B=2 RAMB=1, B=3 RAMB=1, B=4 RAMB=1, B=5 RAMB=1, B=6 RAMB=1, B=7
$420 - $47F $480 - $4FF $500 - $57F $580 - $5FF $600 - $67F $680 - $6FF $700 - $77F $780 - $7FF
Where, B: RAM bank bit use in instructions.
5
5 Page 
SH66L16A
6. I/O Port
The MCU provides 24 bi-directional I/O ports. The PORT data is put in register $08 - $0D. The PORT control registers $19 - $1B
and $1E control the PORT as input or output. Each I/O port has an internal pull-high resistor, which is controlled by PPULL, Bit3
of the system register $13 and the data of the port, when the PORT is used as input.
PORTD and PORTE are shared with SEG49 - 56 as well as PORTF with COM5 - 8. If the Bit1 - 0 (CS1, CS0) of the system
register $14 are set to “01B”, PORTD.0 - 3 are used as SEG49 - 52. If the Bit1 - 0 (CS1, CS0) of the system register $14 are
cleared to “00B”, PORTD.0 - 3 are used as SEG49 - 52, and PORTE.0 - 3 are used as SEG53 - 56. If the Bit2 (O/S) of the
system register $14 is cleared to “0”, PORTF.0 - 3 are used as COM5 - 8.
If the “PORTA.1 - 3 input only select” code option is enabled, PORTA.1 - 3 can only be used as input ports even when the
PACR.1 - 3 have been set to “1”.
Port I/O mapping address is shown as follows:
Address Bit3
$08 PA.3
Bit2
PA.2
Bit1
PA.1
Bit0
PA.0
R/W
R/W PORTA data register
Remarks
$09
PB.3
PB.2
PB.1
PB.0 R/W PORTB data register
$0A
PC.3
PC.2
PC.1
PC.0 R/W PORTC data register
$0B
PD.3
PD.2
PD.1
PD.0 R/W PORTD data register
$0C PE.3 PE.2 PE.1 PE.0 R/W PORTE data register
$0D PF.3 PF.2 PF.1 PF.0 R/W PORTF data register
$19 PACR.3 PACR.2 PACR.1 PACR.0 R/W PORTA input/output control register
$1A PBCR.3 PBCR.2 PBCR.1 PBCR.0 R/W PORTB input/output control register
$1B PCCR.3 PCCR.2 PCCR.1 PCCR.0 R/W PORTC input/output control register
$1E - PFCR PECR PDCR R/W Bit2-0: PORTF, PORTE, PORTD input/output control register
PA (/B/C) CR.n, (n = 0, 1, 2, 3)
0: Set I/O as an input direction. (Power on initial)
1: Set I/O as an output direction.
Equivalent Circuit for a Single I/O Pin.
VDD
PPULL
I/O Control
Register
Weak
VDD Pull high
DATA
Regiser
I/O Pad
System Register $13
DATA
READ DATA IN
READ
GND
Address Bit3 Bit2 Bit1
$13
PPULL
PUMP
OFF
AF
0XX
Bit0
PAM
X
R/W
Remarks
Bit0: Alarm enable control register
Bit1: Alarm carrier frequency control register
R/W Bit2: LCD pump ON/OFF control register
1: LCD pump OFF 0: LCD pump ON
Bit3: Port Pull-High Control register
R/W Port Pull-high resistor disable (Power on initial)
1 X X X R/W Port Pull-high resistor enable
To turn on the pull-high resistor, user must set PPULL to “1”, and write “1” to the port data register when the port is input.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SH66L16A.PDF ] | |
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