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PDF SH66K33A Data sheet ( Hoja de datos )
| Número de pieza | SH66K33A | |
| Descripción | Mask 1K 4-bit Microcontroller | |
| Fabricantes | Sino Wealth | |
| Logotipo |  |
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SH66K33A
MASK 1K 4-bit Micro-controller
Features
SH6610C-Based Single-Chip 4-bit Micro-Controller
ROM: 1K X 16 bits
RAM: 80 X 4 bits
- 32 System Control Register
- 48 Data memory
Operation Voltage: 1.8V - 3.6V (Typically 3.0V)
16 CMOS Bi-directional I/O pins and 1 COMS input pin
4-Level Stack (Including interrupts)
One 8-bit Auto Re-Loaded Timer/Counter
Warm-up Timer
Powerful Interrupt Sources:
- Timer0 Interrupt
- External Interrupts: PORTB & PORTC & PORTD
(Rising edge)
Oscillator (Code Option)
- Crystal Oscillator: 400kHz - 4MHz
- Ceramic Resonator: 400kHz - 4MHz
- Internal RC Oscillator: 4MHz ± 4% (different from
SH67P33A)
Instruction Cycle Time (4/fOSC or 16/fOSC)
Two Low Power Operation Modes: HALT And STOP
Reset
- Built-in Watchdog Timer
- Built-in Power-on Reset (POR)
Available In CHIP FORM
20-pin DIP/TSSOP/SOP package
Mask type
Low Voltage Reset function
Remote Control Programmable Carrier Synthesizer
General Description
SH66K33A is a single-chip 4-bit micro-controller. This device integrates a SH6610C CPU core, RAM, ROM, timer,
programmable input/output pins and carrier synthesizer. When in standby status, system will stop oscillator and remain low
power consumption. The SH66K33A is suitable for infrared remote control transmitter application.
Pin Configuration (20-Lead DIP/SOP/TSSOP Package)
GND
PORTD.0
PORTD.1
PORTE.0/OSCI
PORTE.1/OSCO
PORTD.2
PORTC.0
PORTC.1
PORTC.2
PORTC.3
1
2
3
4
5
6
7
8
9
10
20 VDD
19 REM
18 PORTA.3
17 PORTA.2
16 PORTA.1
15 PORTA.0
14 PORTB.3
13 PORTB.2
12 PORTB.1
11 PORTB.0
1 V2.2
1 page  
4. Initial State
4.1. System Register State:
Address
Bit 3
Bit 2
Bit 1
Bit 0 Power-on Reset
$00 - IET0 - IEP
-0-0
$01
- IRQT0 -
IRQP
-0-0
$02
-
TM0.2
TM0.1
TM0.0
0000
$03 - - - -
-
$04
TL0.3
TL0.2
TL0.1
TL0.0
xxxx
$05
TH0.3
TH0.2
TH0.1
TH0.0
xxxx
$06 - $07
-
-
-
-
-
$08
PA.3
PA.2
PA.1
PA.0
0000
$09
PB.3
PB.2
PB.1
PB.0
0000
$0A
PC.3
PC.2
PC.1
PC.0
0000
$0B
-
PD.2
PD.1
PD.0
-000
$0C -
-
PE.1
PE.0
--00
$0D -
-
-
REMO
REM
---0
$0E
TBR.3
TBR.2
TBR.1
TBR.0
xxxx
$0F
INX.3
INX.2
INX.1
INX.0
xxxx
$10
DPL.3
DPL.2
DPL.1
DPL.0
xxxx
$11
-
DPM.2
DPM.1
DPM.0
-xxx
$12
-
DPH.2
DPH.1
DPH.0
-xxx
$13
PPULL
CPS2
CPS1
CPS0
0000
$14 WDT
-
-
-
1---
$15
LVR3
LVR2
LVR1
LVR0
0000
$16 PACR.3 PACR.2 PACR.1 PACR.0
0000
$17 PBCR.3 PBCR.2 PBCR.1 PBCR.0
0000
$18 PCCR.3 PCCR.2 PCCR.1 PCCR.0
0000
$19 - PDCR.2 PDCR.1 -
-00-
$1A -
- PECR.1 PECR.0
--00
$1B
CFL3
CFL2
CFL1
CFL0
0000
$1C
CFL7
CFL6
CFL5
CFL4
0000
$1D
CFH3
CFH2
CFH1
CFH0
0000
$1E
CFH7
CFH6
CFH5
CFH4
0000
$1F - - - -
-
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'.
4.2. Others Initial States:
Others
Power-on Reset
LVR Reset
Program Counter (PC)
$000
$000
CY
Undefined
Unchanged
Accumulator (AC)
Undefined
Unchanged
Data Memory
Undefined
Unchanged
SH66K33A
LVR Reset
-0-0
-0-0
0000
-
uuuu
uuuu
-
0000
0000
0000
-000
--00
---0
xxxx
xxxx
xxxx
-xxx
-xxx
0000
1---
0000
0000
0000
0000
-00-
--00
0000
0000
0000
0000
-
WDT Reset
-0-0
-0-0
uuuu
-
uuuu
uuuu
-
0000
0000
0000
-000
--00
---0
uuuu
uuuu
uuuu
-uuu
-uuu
0uuu
0---
uuuu
0000
0000
0000
-00-
--00
uuuu
uuuu
uuuu
uuuu
-
WDT Reset
$000
Unchanged
Unchanged
Unchanged
5
5 Page 
SH66K33A
9. Remote Control Carrier Synthesizer
The device has a built-in carrier synthesizer for infrared or RF remote control circuits.
System Register:
Address
$0D
$13
Bit3
-
PPULL
Bit2
-
CPS2
Bit1
-
CPS1
Bit0
REMO
REM
CPS0
R/W
Remarks
W Bit0: REMO output data.
R Bit0: REM pin output status.
R/W Bit2-0: Carrier count source prescaler control
The carrier synthesizer can be programmed in several different prescaler ratios by setting CPS2 - 0.
CPS2
0
0
0
0
1
1
1
1
CPS1
0
0
1
1
0
0
1
1
CPS0
0
1
0
1
0
1
0
1
Prescaler Divide Ratio
fOSC/211
fOSC/29
fOSC/27
fOSC/25
fOSC/23
fOSC/22
fOSC/21
fOSC/20
Ratio N
2048 (initial)
512
128
32
8
4
2
1
The carrier-generating counter is an 8-bit count-up counter and two 8-bit data load registers (High level data register and Low
level data register). Writing data into the data load registers can initialize the counter.
After system reset, the counter is automatically loaded with the contents of high level data register and output high level at the
same time. Following when counter counts overflow from $FF to $00,the counter is automatically loaded with the contents of
low level data register and output low level at the same time. When counter counts overflow again from $FF to $00 again, the
counter will be loaded with the contents of high level data register again. The above sequences make up a complete loop. So
the carrier synthesizer can output continuous carrier wave of certain duties and certain period.
If REMO is set to “1” from “0”, the carrier counter will be initialized to load high level data register and output high level whatever
states the counter is.
Load register programming: User can modify low level data register to change the width of the low level or modify high level
data register to change the width of high level. In the way the carrier synthesizer can output carrier wave of different duties and
different period.
REM will remain outputting carrier wave in HALT mode, but will output GND in STOP mode.
Carrier Load Data Register:
Address
$1B
$1C
$1D
$1E
Bit3
CFL3
CFL7
CFH3
CFH7
Bit2
CFL2
CFL6
CFH2
CFH6
Bit1
CFL1
CFL5
CFH1
CFH5
Bit0
CFL0
CFL4
CFH0
CFH4
R/W
Remarks
R/W Carrier low level timer load data register (low nibble)
R/W Carrier low level timer load data register (high nibble)
R/W Carrier high level timer load data register (low nibble)
R/W Carrier high level timer load data register (high nibble)
11
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet SH66K33A.PDF ] | |
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