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PDF UPC8187TB Data sheet ( Hoja de datos )
| Número de pieza | UPC8187TB | |
| Descripción | SILICON RFIC HI-IP3 FREQUENCY UP-CONVERTER | |
| Fabricantes | CEL | |
| Logotipo |  |
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DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
μPC8187TB
SILICON MMIC HI-IP3 FREQUENCY UP-CONVERTER
FOR WIRELESS TRANSCEIVER
DESCRIPTION
The μPC8187TB is a silicon monolithic integrated circuit designed as frequency up-converter for wireless
transceiver. This IC is higher operating frequency, lower distortion and higher conversion gain than conventional
μPC8163TB.
This IC is manufactured using NEC’s 30 GHz fmax UHS0 (Ultra High Speed Process) silicon bipolar process.
FEATURES
• High output frequency
: fRFout = 0.8 to 2.5 GHz
• High-density surface mounting : 6-pin super minimold package
• Supply voltage
: VCC = 2.7 to 3.3 V
• Higher IP3
: OIP3 = +10 dBm @ fRFout = 1.9 GHz
APPLICATION
• TDMA, PCS, CDMA etc.
ORDERING INFORMATION
Part Number
μPC8187TB-E3-A
Package
6-pin super minimold
Marking
C3G
Supplying Form
• Embossed tape 8 mm wide.
• Pin 1, 2, 3 face the tape perforation side.
• Qty 3 kpcs/reel.
Remark To order evaluation samples, please contact your local sales office.
(Part number for sample order: μPC8187TB-A)
Caution Electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Document No. P15106EJ2V0DS00 (2nd edition)
Date Published January 2001 N CP(K)
The mark shows major revised points.
1 page  
5. PIN EXPLANATION
Pin Pin
No. Name
1 IFinput
Applied
Voltage
(V)
−
2 GND
4
GND
3 LOinput
−
5 VCC 2.7 to 3.3
6 RFoutput Same
bias as
VCC
through
external
inductor
Pin
Voltage
(V)Note
1.2
−
2.1
−
−
Function and Explanation
This pin is IF input to double bal-
anced mixer (DBM). The input is
designed as high impedance.
The circuit contributes to sup-
press spurious signal. Also this
symmetrical circuit can keep
specified performance insensitive
to process-condition distribution.
For above reason, double bal-
anced mixer is adopted.
GND pin. Ground pattern on the
board should be formed as wide
as possible. Track Length should
be kept as short as possible to
minimize ground impedance.
Local input pin. Recommendable
input level is −10 to 0 dBm.
Supply voltage pin.
This pin is RF output from DBM.
This pin is designed as open
collector. Due to the high imped-
ance output, this pin should be
externally equipped with LC
matching circuit to next stage.
3
Note Each pin voltage is measured at VCC = VRFout = 2.8 V.
μPC8187TB
Equivalent Circuit
5
6
1
2
Data Sheet P15106EJ2V0DS
5
5 Page 
μPC8187TB
Caution The test circuits and board pattern on data sheet are for performance evaluation use only (They
are not recommended circuits). In the case of actual design-in, matching circuit should be de-
termined using S-parameter of desired frequency in accordance to actual mounting pattern.
Data Sheet P15106EJ2V0DS
11
11 Page | ||
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