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PDF Si4734-B20 Data sheet ( Hoja de datos )

Número de pieza Si4734-B20
Descripción BROADCAST AM/FM/SW/LW RADIO RECEIVER
Fabricantes Silicon Laboratories 
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Si4734/35-B20
BROADCAST AM/FM/SW/LW RADIO RECEIVER
Features
„ Worldwide FM band support
„ No manual alignment necessary
(64–108 MHz)
„ Adjustable channel filters
„ Worldwide AM band support
„ EN55020 complaint
(520–1710 kHz)
„ Programmable reference clock
„ SW band support (2.3–21.85 MHz) „ Digital volume control
„ LW band support (153–279 KHz)
„ Adjustable soft mute control
„ Excellent real-world performance
„ RDS/RBDS processor (Si4735 only)
„ Freq synthesizer with integrated VCO „ Optional digital audio out (Si4735 only)
„ Automatic frequency control (AFC) „ 2-wire and 3-wire control interface
„ Automatic gain control (AGC)
„ 2.7 to 5.5 V supply voltage
„ Integrated LDO regulator
„ Wide range of ferrite loop sticks and air
„ Digital FM stereo decoder
loop antennas supported
„ Programmable de-emphasis
„ 3 x 3 x 0.55 mm 20-pin QFN package
„ Adaptive noise suppression
z Pb-free/RoHS compliant
„ AM/FM/SW/LW digital tuning
Applications
„ Table and portable radios
„ Stereos
„ Mini/micro systems
„ CD/DVD players
„ Portable media players
„ Boom boxes
„ Cellular handsets
„ Modules
„ Clock radios
„ Mini HiFi
„ Entertainment systems
Description
The Si4734/35 is the first digital CMOS AM/FM/SW/LW radio receiver IC that
integrates the complete tuner function from antenna input to audio output.
Ordering Information:
See page 31.
Pin Assignments
Si4734/35-GM
(Top View)
NC 1
FMI 2
RFGND 3
AMI 4
RST 5
6
20 19 18 17 16
15 DOUT
GND
PAD
14 LOUT
13 ROUT
12 GND
7 8 9 10 11 VDD
Functional Block Diagram
FM / SW
ANT
FMI
AM / LW
ANT
AMI
RFGND
2.7 - 5.5 V
VDD
GND
LNA
AGC
LNA
AGC
LDO
Si4734/35
RDS
(Si4735)
LOW-IF
DIGITAL
AUDIO
(Si4735)
DOUT
DFS
GPO/DCLK
ADC DAC
DSP
ADC DAC
ROUT
LOUT
AFC
CONTROL
INTERFACE
VIO
1.5-3.6V
Patents pending
Notes:
1. To ensure proper operation and
receiver performance, follow the
guidelines in “AN383: Antenna
Selection and Universal Layout
Guide.” Silicon Laboratories will
evaluate schematics and layouts for
qualified customers.
2. Place Si4734/35 as close as
possible to antenna jack and keep
the FMI and AMI traces as short as
possible.
Rev. 1.0 4/08
Copyright © 2008 by Silicon Laboratories
Si4734/35-B20

1 page




Si4734-B20 pdf
Si4734/35-B20
Table 3. DC Characteristics
(VDD = 2.7 to 5.5 V, VIO = 1.5 to 3.6 V, TA = –20 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
FM Mode
Supply Current
Supply Current1
RDS Supply Current2
Supply Current2
IFM
IFM
IFM
IFMD
Low SNR level
Digital Output Mode
19.2
19.8
19.9
18.0
22
23
23
20.5
AM/SW/LW Mode
Supply Current
Supply Current2
Supplies and Interface
IAM
IAMD
Analog Output Mode
Digital Output Mode
17.3 20.5
15.5 20.5
Interface Supply Current
IIO
— 320 600
VDD Powerdown Current
IDDPD
— 10 20
VIO Powerdown Current
High Level Input Voltage3
Low Level Input Voltage3
High Level Input Current3
Low Level Input Current3
High Level Output Voltage4
Low Level Output Voltage4
IIOPD SCLK, RCLK inactive
1
10
VIH 0.7 x VIO — VIO + 0.3
VIL
–0.3
— 0.3 x VIO
IIH VIN = VIO = 3.6 V –10
10
IIL
VIN = 0 V,
–10 —
10
VIO = 3.6 V
VOH
IOUT = 500 µA
0.8 x VIO
VOL IOUT = –500 µA
— 0.2 x VIO
Notes:
1. LNA is automatically switched to higher current mode for optimum sensitivity in weak signal conditions.
2. Specifications are guaranteed by characterization.
3. For input pins SCLK, SEN, SDIO, RST, RCLK, DCLK, and DFS.
4. For output pins SDIO, DOUT, GPO1, GPO2, and GPO3.
Unit
mA
mA
mA
mA
mA
mA
µA
µA
µA
V
V
µA
µA
V
V
Rev. 1.0
5

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Si4734-B20 arduino
Si4734/35-B20
Table 8. Digital Audio Interface Characteristics
(VDD = 2.7 to 5.5 V, VIO = 1.5 to 3.6 V, TA = –20 to 85 °C)
Parameter
Symbol Test Condition
DCLK Cycle Time
DCLK Pulse Width High
DCLK Pulse Width Low
DFS Set-up Time to DCLK Rising Edge
DFS Hold Time from DCLK Rising Edge
DOUT Propagation Delay from DCLK Falling
Edge
tDCT
tDCH
tDCL
tSU:DFS
tHD:DFS
tPD:DOUT
Min
26
10
10
5
5
0
Typ Max Unit
— 1000 ns
— — ns
— — ns
— — ns
— — ns
— 12 ns
DCLK
DFS
DOUT
tDCH
tDCL
tDCT
tHD:DFS
tSU:DFS
tPD:OUT
Figure 8. Digital Audio Interface Timing Parameters, I2S Mode
Rev. 1.0
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