PDF AN44071A Data sheet ( Hoja de datos )

Número de pieza	AN44071A
Descripción	37V / 1.0A & 1.7A Dual Microstepping Motor Driver
Fabricantes	Panasonic
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No Preview Available ! AN44071A 37V/1.0A&1.7A Dual Microstepping Motor Driver FEATURES ・Built-in thermal protection (TSD) ・2-channel stepping motor driver If chip junction temperature rises and reaches to the A signal driver controls 2 stepping motors ・Built-in decoder for micro steps (2-phase, half step, setup temperature, all motor outputs are turned OFF. ・Built-in abnormal detection output function 1-2 phase, W1-2 phase and 2W1-2 phase excitation) If OCP or TSD operates, an abnormal detection signal Stepping motor can be driven by only external clock signal. is output. ・PWM can be driven by built-in CR (3-value can be selected・Built-in standby function during PWM OFF period.) The operation of standby function can lower current The selection of PWM OFF period enables the best PWM consumption of this LSI. drive. ・Built-in Home Position function ・Mix Decay control (4-value can be selected for Fast Decay Home Position function can detect the position of motor. ratio) ・Built-in step detection output function Mix Decay control can improve accuracy of motor current If step detection output function detects clock input waveform. ・Built-in over-current protection (OCP) If the current flows to motor output more than the setup signal, it outputs a signal. ・Built-in 5 V power supply (accuracy : ±5%) ・56 pin Plastic Small Outline Package With Heat Sink value due to ground-fault etc., the OCP operates and all (SOP Type) motor outputs are turned OFF. ・Built-in under voltage lockout (UVLO) If supply voltage falls to less than the operating supply voltage range, the UVLO operates and all motor outputs are turned OFF. APPLICATIONS ・LSI for stepping motor drives DESCRIPTION AN44071A is a quad channel H-bridge driver LSI. Two bipolar stepping motor can be controlled by a single driver LSI. Interface control is 1CLK_type, it can be selected 2-phase excitation, half- step, 1-2 phase excitation, W1-2 phase excitation and 2W1-2 phase excitation. SIMPLIFIED APPLICATION 10 kΩ ENABLEAB 40 DECAY1AB 23 DECAY2AB 34 STPHAB 20 CLKAB 39 DIRAB 38 ST1AB 35 ST2AB 36 ST3AB 37 VREFAB 21 PWMSWAB 22 16 BC1 17 BC2 0.01 μF 18 VPUMP 0.01 μF 29 AOUT2 31 RCSA 33 AOUT1 24 BOUT2 26 RCSB TjmonABCD 10 0.1 μF S5VOUT 13 STBY 44 28 AOUT1 41 VM2 0.1 μF NFAULT 11 10 kΩ TEST 12 + 43 VM1 47 μF PWMSWCD 7 VREFCD 8 56 COUT2 CLKCD 46 DIRCD 47 ST1CD 50 54 RCSC 52 COUT1 ST2CD 49 ST3CD 48 5 DOUT2 STPHCD 9 10 kΩ ENABLECD 45 3 RCSD DECAY1CD 6 1 DOUT1 DECAY2CD 51 14 GND Notes) This application circuit is an example. The operation of mass production set is not guaranteed. You should perform enough evaluation and verification on the design of mass production set. You are fully responsible for the incorporation of the above application circuit and information in the design of your equipment. Mix Decay effect for Motor current 【Fig1:Slow Decay】 +OUT -OUT 2ms/div distortion 【Fig2:Mix Decay(25%)】 Motor Current +OUT -OUT Motor Current 2ms/div distortionless Condition: excitation mode ：2W1-2 phase drive fig1 DECAY1=L DECAY2=L fig2 DECAY1=L DECAY2=H Publication date: November 2012 1 Ver. BEB 1 page AN44071A ELECRTRICAL CHARACTERISTICS （continued） VM=24V,Ta = 25°C±2°C unless otherwise noted. Parameter Symbol Condition I/O Block （Continued) PWMSW High-level input voltage PWMSW Middle-level input voltage PWMSW Low-level input voltage PWMSW High-level input current PWMSW Low-level input current PWMSW open voltage DECAY High-level input voltage DECAY Low-level input voltage DECAY High-level input current DECAY Low-level input current DIR High-level input voltage DIR Low-level input voltage DIR High-level input current DIR Low-level input current ST High-level input voltage ST Low-level input voltage ST High-level input current ST Low-level input current Torque Control Block Input bias current 1 Input bias current 2 PWM OFF time 1 PWM OFF time 2 PWM OFF time 3 Pulse blanking time Comp threshold Reference voltage block Reference voltage Output impedance VPWMSWH — VPWMSWM — VPWMSWL IPWMSWH IPWMSWL VPWMSWO VDECAYH VDECAYL IDECAYH IDECAYL VDIRH VDIRL IDIRH IDIRL VSTH VSTL ISTH ISTL — PWMSW = 5 V PWMSW = 0 V — — — DECAY = 5 V DECAY = 0 V — — DIR = 5 V DIR = 0 V — — ST = 5 V ST = 0 V IREFH IREFL TOFF1 TOFF2 TOFF3 TB VTCMP VREFAB = VREFCD = 5 V VREFAB = VREFCD = 0 V PWMSW = Low PWMSW = High PWMSW = Middle VREFAB = VREFCD = 0 V VREFAB = VREFCD = 5 V VS5VOUT ZS5VOUT IS5VOUT = 0 mA IS5VOUT = –7 mA Limits Unit Note Min Typ Max 2.3 — 5.5 V 4 1.3 — 1.7 V 4 0 — 0.6 V 4 40 83 150 μA 4 –70 –36 –18 μA 4 1.3 1.5 1.7 V 4 2.1 — 5.5 V 5 0 — 0.6 V 5 25 50 100 μA 5 –2 — 2 μA 5 2.1 — 5.5 V 6 0 — 0.6 V 6 25 50 100 μA 6 –2 — 2 μA 6 2.1 — 5.5 V 7 0 — 0.6 V 7 25 50 100 μA 7 –2 — 2 μA 7 –2 — 2 μA — –2 — 2 μA — 16.8 28 39.2 μs 4 9.1 15.2 21.3 μs 4 4.9 8.1 11.3 μs 4 0.4 0.7 1.0 μs — 475 500 525 mV — 4.75 5.0 5.25 V — — — 10 Ω — Notes) 4 : PWMSW represents PWMSWAB and PWMSWCD. 5 : DECAY represents DECAY1AB, DECAY2AB, DECAY1CD and DECAY2CD. 6 : DIR represents DIRAB and DIRCD. *7 : ST represents ST1AB, ST2AB, ST3AB, ST1CD, ST2CD and ST3CD. 5 Ver. BEB 5 Page FUNCTIONAL BLOCK DIAGRAM AN44071A ENABLEAB DECAY1AB DECAY2AB STPHAB 40 23 34 20 CLKAB DIRAB ST1AB ST2AB ST3AB 39 38 35 36 37 Micro Step Decoder DACA DACB VREFAB 21 1/10 PWMSWAB 22 PWMSW VPUMP 18 BC1 16 BC2 17 TjmonABCD 10 CHARGE PUMP S5VOUT 13 AMP BG VM STBY 44 11 NFAULT STBY BLANK OSC Gate Circuit 29 AOUT2 31 RCSA 33 AOUT1 BOUT2 24 26 RCSB TSD OCP AOUT1 DOUT2 S5VOUT UVLO 28 BOUT1 41 VM2 100 kΩ 43 VM1 TEST 12 TEST PWMSWCD 7 PWMSW 8 VREFCD CLKCD DIRCD ST1CD ST2CD ST3CD STPHCD 46 47 50 49 48 9 1/10 Micro Step Decoder DACC DACD ENABLECD 45 DECAY1CD DECAY2CD 6 51 GND 14 BLANK OSC Gate Circuit 56 COUT2 54 RCSC 52 COUT1 DOUT2 5 3 RCSD 1 DOUT1 Note) This block diagram is for explaining functions. Part of the block diagram may be omitted, or it may be simplified. 11 Ver. BEB 11 Page

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