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Número de pieza | ST7570TR | |
Descripción | S-FSK power line networking system-on-chip | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de ST7570TR (archivo pdf) en la parte inferior de esta página. Total 26 Páginas | ||
No Preview Available ! ST7570
S-FSK power line networking system-on-chip
Features
■ Fully integrated narrow-band power line
networking system-on-chip
■ High performing PHY processor with
embedded turn-key firmware for spread
frequency shift keying (S-FSK) modulation:
– Programmable bit rate up to 2.4 Kbps (@
50 Hz)
– 1 Hz step programmable carriers up to
148.5 kHz
– Signal to noise ratio estimation
– Received signal strength indication
■ Protocol engine embedding:
– IEC61334-5-1 PHY and MAC layers
– Alarm management
– Repeater Call procedure
– Intelligent search initiator process
■ On chip peripherals:
– Host controller UART interface
■ Fully integrated analog front end:
– ADC and DAC
– PGA with automatic gain control for high
receiving sensitivity
– High linearity modulated signal generation
■ Fully integrated single-ended power amplifier
for line driving
– Up to 1 A rms, 14 V p-p output
– Configurable Active filtering topology
– Very high linearity
– Embedded temperature sensor
– Current control feature
■ 8 to 18 V power amplifier supply
■ 3.3 V or 5 V digital I/O supply
■ Integrated 5 V and 1.8 V linear regulators for
AFE and digital core supply
■ Mains zero crossing synchronization
Datasheet — production data
6&1&0. XX ,
PITCH
■ Suitable for EN50065 and FCC part 15
compliant applications
■ VFQFPN48 package with exposed pad
■ -40 °C to +85 °C temperature range
Applications
■ Smart metering applications
■ Street lighting control
■ Command and control networking
Description
The ST7570 is a powerful power line networking
system-on-chip. It combines a high-performance
PHY processor core and a protocol controller core
with a fully integrated analog front end (AFE) and
line driver.
The ST7570 features allow the most cost-
effective, single-chip power line communication
solution based on IEC61334-5-1 S-FSK standard.
Table 1. Device summary
Order codes
Package
ST7570
ST7570TR
VFQFPN48
Packaging
Tube
Tape and reel
September 2012
This is information on a product in full production.
Doc ID 17526 Rev 2
1/26
www.st.com
26
1 page ST7570
2.1 Pin description
Pin connection
Table 2. Pin description
Pin Name
Type
Reset state Pull-up
Description
UART data out
1
TXD
Digital output High Z Disabled
External pull-up to VDDIO required
2 RXD Digital input High Z Disabled UART data in
3 VDDIO
Power
-
- 3.3 V – 5 V I/O external supply
4
TRSTN
Digital input
Input Enabled System JTAG interface reset (active low)
5
TMS
Digital input
Input Enabled System JTAG interface mode select
6 GND Power - - Digital ground
System JTAG interface clock.
7 TCK Digital input High Z Disabled
External pull-up to VDDIO required
8
TDO
Digital output High Z Disabled System JTAG interface data out
9
TDI
Digital input
Input Enabled System JTAG interface data in
10 RESETN
Digital input
Input Disabled System reset (active low)
1.8 V digital supply.
11 VDD Power - - Internally connected to VDD_REG_1V8
Externally accessible for filtering purposes only
12 XIN
Analog
-
- Crystal oscillator input / external clock input
Crystal oscillator output
13 XOUT
Analog
-
- (if external clock supplied on XIN, XOUT must be
left floating)
14 GND Power - - Digital ground
15 VSSA
Power
-
- Analog ground
16 VDD_PLL
Power
-
-
1.8 V PLL supply voltage.
Connect externally to VDD
5 V analog supply / internal regulator output
17 VCCA
Power
-
-
Externally accessible for filtering purposes only
18 ZC_IN_A Analog input
-
- Analog zero-crossing input
19 RX_IN Analog input
20 TX_OUT Analog output
-
-
- Reception analog input
- Transmission analog output
21 PA_IN+ Analog input
-
Power amplifier
-
Non-inverting input
22 PA_IN- Analog input
-
Power amplifier
-
Inverting input
23
CL
Analog input
-
24 VCC
Power
-
- Current limit sense input
- Power supply
25 VSS Power - - Power ground
Doc ID 17526 Rev 2
5/26
5 Page ST7570
Table 5. Electrical characteristics (continued)
Symbol
Parameter
Note
PGA_MIN
PGA_MAX
PGA minimum gain
PGA maximum gain
Oscillator
V(XIN)
Oscillator input voltage swing
V(XIN) TH Oscillator input voltage threshold
f(XIN)
Crystal oscillator frequency
f(XIN) TOL
External quartz crystal frequency
tolerance
ESR
External quartz crystal ESR value
CL
External quartz crystal load
capacitance
fCLK_AFE
Internal frequency of the analog
front end
fCLK_PROT_ctrl
Internal frequency of the protocol
Ctrl core
fCLK_PHY_proces Internal frequency of the PHY
sor processor core
Clock frequency
supplied externally
Temperature sensor
T_TH1
T_TH2
T_TH3
T_TH4
Temperature threshold 1
Temperature threshold 2
Temperature threshold 3
Temperature threshold 4
Zero crossing comparator
V(ZC_IN_A) MAX
Zero crossing analog input voltage
range
V(ZC_IN_A) TL
Zero crossing analog input low
threshold
V(ZC_IN_A) TH
Zero crossing analog input high
threshold
V(ZC_IN_A)
HYST
Zero crossing analog input
hysteresis
ZC_IN_D d.c.
Zero crossing digital input duty
cycle
Digital section
Digital I/O
Electrical characteristics
Min.
Typ.
-18
30
Max.
Unit
dB
dB
0.8
-150
1.8 VDDIO V p-p
0.9 1 V
8 MHz
+150 ppm
100 Ω
16 20 pF
8 MHz
28 MHz
56 MHz
63 70 77 °C
90 100 110 °C
112 125 138 °C
153 170 187 °C
10 V p-p
-40 -30 -20 mV
30 40 50 mV
62 70 78 mV
50 %
Doc ID 17526 Rev 2
11/26
11 Page |
Páginas | Total 26 Páginas | |
PDF Descargar | [ Datasheet ST7570TR.PDF ] |
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