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PDF CYIL1SM1300AA Data sheet ( Hoja de datos )

Número de pieza CYIL1SM1300AA
Descripción LUPA-1300 1.3 MPxl High Speed CMOS Image Sensor
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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CYIL1SM1300AA
LUPA-1300 1.3 MPxl High Speed CMOS
Image Sensor
Preamble
Overview
This document describes the interfacing and the driving of the
image sensor LUPA-1300, which is a 1280 by 1024 CMOS pixel
array working at 450 frames/sec. The sensor is an active pixel
sensor with synchronous shutter. The pixel size is 14 * 14 µm
and the sensor is designed to achieve a fame rate of 450
frames/sec at full resolution. This high frame rate can be
achieved by 16 parallel output amplifiers each working at 40 MHz
pixel rate.
The readout speed can be boosted by means of windowed
Region Of Interest (ROI) readout. High dynamic range scenes
can be captured using the double slope functionality.
The sensor uses a 3-wire Serial-Parallel Interface (SPI). It is
housed in a 145-pin ceramic PGA package.
In the following sections the different modules of the image
sensor are discussed more into detail. This data sheet allows the
user to develop a camera-system based on the described timing
and interfacing.
Main Features
The main features of the image sensor are identified as:
SXGA resolution: 1280 x 1024 active pixels.
14 µm2 square pixels (based on the high-fill factor active pixel
sensor technology of FillFactory (US patent No. 6,225,670 and
others)).
Pixel rate of 40 MHz using 16 parallel outputs.
Random programmable windowing.
Dual slope integration possible.
145-pin PGA package.
Peak QE x FF of 15%.
Optical format: 1,43" (17.9 mm x 14.3 mm).
Optical dynamic range: 62 dB (1330:1) in single slope operation
and 80 to100 dB in double slope operation.
16 parallel analog output amplifiers.
Synchronous pipelined shutter.
Processing is done in a CMOS 0.50 µm triple metal process.
Ordering Information
Marketing Part Number
CYIL1SM1300AA-GDC
CYIL1SM1300AA-GWC
Description
Mono with Glass
Mono without Glass
Package
145-pin PGA
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-05711 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised September 21, 2009
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CYIL1SM1300AA pdf
CYIL1SM1300AA
Recommended Operating Conditions
Table 5. Recommended Operation Conditions
Symbol
Parameter2
Vdda
Power Supply Column Read Out Module
Vdd Power Supply Digital Modules
Vddr
Power Supply Logic For Drivers
Voo Power Supply Output Stages
Vres
Power Supply Reset Drivers
Vres_ds
Power Supply Multiple Slope Reset Driver
Vmem_h
Power Supply Memory Element (High Level)
Vmem_l
Power Supply Memory Element (Low Level)
Vpix Power Supply Pixel Array
Vstable
Power Supply Output Stages. Decouples Noise on the Voo Supply from the Output
Signal.
Sensor Architecture
The image sensor consists of the pixel array, the column readout
electronics, X-and Y addressing, on-chip drivers, the output
amplifiers and some logic.
Typical
5
5
5
5
6
4.5
6
4.5
4.5
5.5
Unit
V
V
V
V
V
V
V
V
V
V
Notes
2. All parameters are characterized for DC conditions after thermal equilibrium has been established.
3. Unused inputs must always be tied to an appropriate logic level, e.g., either VDD or GND.
4. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however it is recommended that normal precautions
be taken to avoid application of any voltages higher than the maximum rated voltages to this high impedance circuit.
5. All power supplies should be sufficiently decoupled because spikes and drops in the power supplies will be immediately visible in the analog output signals.
Document Number: 38-05711 Rev. *D
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CYIL1SM1300AA
Table 7. Power Supplies Used in the LUPA Design
Name
Vdda
Vdd
Voo
Vstable
Max Current
50 mA
20 mA
85 mA
6 mA
Typ.
5V
5V
5V
5.5V
Max
6V
Vpix
Vddr
Vres
VmemH
VmemL
200 mA
20 mA
50 mA
50 mA
50 mA
4.5V
5V
6V
6V
4.5V
6V
Description
Power supply column readout module
Power supply digital modules
Power supply output stages
Power supply output stages. Decouples noise on the Voo supply from the
output signal.
Power supply pixel array
Power supply logic for drivers
Power supply to reset the pixels
Power supply for high DC level Vmem
Power supply for low DC level Vmem
The maximum currents mentioned in Table 7 are peak currents. The power supplies need to be able to deliver these currents especially
the maximum supply current for Vpix.
It is important to notice that we don't do any power supply filtering on chip and that noise on these power supplies can contribute
immediately to the noise on the signal. Especially the voltage supplies Vpix and Vdda are important to be well noise free. With respect
to the power supply Voo, a special decoupling is used, for which an additional power supply Vstable is required.
Figure 11a. Schematic of Typical Decoupling of Power Supply (Source Current)
Figure 11b. Schematic of Typical Decoupling of Power Supply (Source Current)
Notes
10. At start up the Vpix supply draws a very high current (> 300 mA) which has to be limited (max. 200 mA) otherwise the bond wires of the particular supply will
be destroyed. One should make sure that the Vpix power supply limits the current draw to the Vpix sensor supply pins to max. 200 mA. When the bond wires
of Vpix are destroyed the sensor isn't operating normally and will not meet the described specifications.
11. VmemL must sink a current, not source it. All power supplies should be decoupled very close to the sensor pin (typical 100 nF to filter high frequency dips and
10 microF to filter slow dips). A typical decoupling circuit is shown in Figure 11. Vres_ds must be able to sink and source current.
Document Number: 38-05711 Rev. *D
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