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XE167 Schematic ( PDF Datasheet ) - Infineon

Teilenummer XE167
Beschreibung 16-Bit Single-Chip Real Time Signal Controller
Hersteller Infineon
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Gesamt 30 Seiten
XE167 Datasheet, Funktion
Data Sheet, V2.1, Aug. 2008
XE167
16-Bit Single-Chip
Real Time Signal Controller
Microcontrollers






XE167 Datasheet, Funktion
16-Bit Single-Chip
Real Time Signal Controller
XE166 Family
XE167
1 Summary of Features
For a quick overview and easy reference, the features of the XE167 are summarized
here.
• High-performance CPU with five-stage pipeline
– 12.5 ns instruction cycle at 80 MHz CPU clock (single-cycle execution)
– One-cycle 32-bit addition and subtraction with 40-bit result
– One-cycle multiplication (16 × 16 bit)
– Background division (32 / 16 bit) in 21 cycles
– One-cycle multiply-and-accumulate (MAC) instructions
– Enhanced Boolean bit manipulation facilities
– Zero-cycle jump execution
– Additional instructions to support HLL and operating systems
– Register-based design with multiple variable register banks
– Fast context switching support with two additional local register banks
– 16 Mbytes total linear address space for code and data
– 1024 Bytes on-chip special function register area (C166 Family compatible)
• Interrupt system with 16 priority levels for up to 87 sources
– Selectable external inputs for interrupt generation and wake-up
– Fastest sample-rate 12.5 ns
• Eight-channel interrupt-driven single-cycle data transfer with
Peripheral Event Controller (PEC), 24-bit pointers cover total address space
• Clock generation from internal or external clock sources,
using on-chip PLL or prescaler
• On-chip memory modules
– 1 Kbyte on-chip stand-by RAM (SBRAM)
– 2 Kbytes on-chip dual-port RAM (DPRAM)
– 16 Kbytes on-chip data SRAM (DSRAM)
– Up to 64 Kbytes on-chip program/data SRAM (PSRAM)
– Up to 768 Kbytes on-chip program memory (Flash memory)
• On-Chip Peripheral Modules
– Two Synchronizable A/D Converters with up to 24 channels, 10-bit resolution,
conversion time below 1 µs, optional data preprocessing (data reduction, range
check)
– 16-channel general purpose capture/compare unit (CAPCOM2)
– Up to four capture/compare units for flexible PWM signal generation (CCU6x)
– Multi-functional general purpose timer unit with 5 timers
Data Sheet
4 V2.1, 2008-08

6 Page









XE167 pdf, datenblatt
XE167x
XE166 Family Derivatives
General Device Information
Notes to Pin Definitions
1. Ctrl.: The output signal for a port pin is selected by bitfield PC in the associated
register Px_IOCRy. Output O0 is selected by setting the respective bitfield PC to
1x00B, output O1 is selected by 1x01B, etc.
Output signal OH is controlled by hardware.
2. Type: Indicates the pad type used (St=standard pad, Sp=special pad, DP=double
pad, In=input pad, PS=power supply) and its power supply domain (A, B, M, 1).
Table 4
Pin Definitions and Functions
Pin Symbol
Ctrl. Type Function
3 TESTM
I In/B Testmode Enable
Enables factory test modes, must be held HIGH for
normal operation (connect to VDDPB).
An internal pullup device will hold this pin high
when nothing is driving it.
4 P7.2
O0 / I St/B Bit 2 of Port 7, General Purpose Input/Output
EMUX0
O1 St/B External Analog MUX Control Output 0 (ADC1)
TxDC4
O2 St/B CAN Node 4 Transmit Data Output
CCU62_
CCPOS0A
I
St/B CCU62 Position Input 0
TDI_C
I St/B JTAG Test Data Input
5 P8.4
O0 / I St/B Bit 4 of Port 8, General Purpose Input/Output
CCU60_
COUT61
O1 St/B CCU60 Channel 1 Output
TMS_D
I St/B JTAG Test Mode Selection Input
6 TRST
I In/B Test-System Reset Input
For normal system operation, pin TRST should be
held low. A high level at this pin at the rising edge
of PORST activates the XE167’s debug system. In
this case, pin TRST must be driven low once to
reset the debug system.
An internal pulldown device will hold this pin low
when nothing is driving it.
7 P8.3
O0 / I St/B Bit 3 of Port 8, General Purpose Input/Output
CCU60_
COUT60
O1 St/B CCU60 Channel 0 Output
TDI_D
I St/B JTAG Test Data Input
Data Sheet
10 V2.1, 2008-08

12 Page





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