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ATmega32U4 Schematic ( PDF Datasheet ) - ATMEL Corporation

Teilenummer ATmega32U4
Beschreibung 8-bit Microcontroller
Hersteller ATMEL Corporation
Logo ATMEL Corporation Logo 




Gesamt 30 Seiten
ATmega32U4 Datasheet, Funktion
ATmega16U4/ATmega32U4
8-bit Microcontroller with 16/32K bytes of ISP Flash and
USB Controller
DATASHEET
Features
High Performance, Low Power AVR® 8-Bit Microcontroller
Advanced RISC Architecture
– 135 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16MHz
– On-Chip 2-cycle Multiplier
Non-volatile Program and Data Memories
– 16/32KB of In-System Self-Programmable Flash
– 1.25/2.5KB Internal SRAM
– 512Bytes/1KB Internal EEPROM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85C/ 100 years at 25C(1)
– Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Parts using external XTAL clock are pre-programed with a default USB bootloader
– Programming Lock for Software Security
JTAG (IEEE® std. 1149.1 compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
USB 2.0 Full-speed/Low Speed Device Module with Interrupt on Transfer Completion
– Complies fully with Universal Serial Bus Specification Rev 2.0
– Supports data transfer rates up to 12Mbit/s and 1.5Mbit/s
– Endpoint 0 for Control Transfers: up to 64-bytes
– Six Programmable Endpoints with IN or Out Directions and with Bulk, Interrupt or
Isochronous Transfers
– Configurable Endpoints size up to 256 bytes in double bank mode
– Fully independent 832 bytes USB DPRAM for endpoint memory allocation
– Suspend/Resume Interrupts
– CPU Reset possible on USB Bus Reset detection
– 48MHz from PLL for Full-speed Bus Operation
– USB Bus Connection/Disconnection on Microcontroller Request
– Crystal-less operation for Low Speed mode
Peripheral Features
– On-chip PLL for USB and High Speed Timer: 32 up to 96MHz operation
– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode
Atmel-7766I-USB-ATmega16U4/32U4-Datasheet_072015






ATmega32U4 Datasheet, Funktion
Port D also serves the functions of various special features of the ATmega16U4/ATmega32U4 as listed on
page 78.
2.2.6
Port E (PE6,PE2)
Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port E output
buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port E pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port E pins are tri-
stated when a reset condition becomes active, even if the clock is not running.
Only bits 2 and 6 are present on the product pinout.
Port E also serves the functions of various special features of the ATmega16U4/ATmega32U4 as listed on
page 81.
2.2.7
Port F (PF7..PF4, PF1,PF0)
Port F serves as analog inputs to the A/D Converter.
Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter channels are not used. Port pins can
provide internal pull-up resistors (selected for each bit). The Port F output buffers have symmetrical drive
characteristics with both high sink and source capability. As inputs, Port F pins that are externally pulled low will
source current if the pull-up resistors are activated. The Port F pins are tri-stated when a reset condition
becomes active, even if the clock is not running.
Bits 2 and 3 are not present on the product pinout.
Port F also serves the functions of the JTAG interface. If the JTAG interface is enabled, the pull-up resistors on
pins PF7(TDI), PF5(TMS), and PF4(TCK) will be activated even if a reset occurs.
2.2.8
D-
USB Full speed / Low Speed Negative Data Upstream Port. Should be connected to the USB D- connector pin
with a serial 22resistor.
2.2.9
D+
USB Full speed / Low Speed Positive Data Upstream Port. Should be connected to the USB D+ connector pin
with a serial 22resistor.
2.2.10 UGND
USB Pads Ground.
2.2.11 UVCC
USB Pads Internal Regulator Input supply voltage.
2.2.12 UCAP
USB Pads Internal Regulator Output supply voltage. Should be connected to an external capacitor (1µF).
2.2.13 VBUS
USB VBUS monitor input.
6 ATmega16U4/32U4 [DATASHEET]
Atmel-7766I-USB-ATmega16U4/32U4-Datasheet_072015

6 Page









ATmega32U4 pdf, datenblatt
Two 8-bit output operands and one 16-bit result input
One 16-bit output operand and one 16-bit result input
Figure 4-2 shows the structure of the 32 general purpose working registers in the CPU.
Figure 4-2. AVR CPU General Purpose Working Registers
General
Purpose
Working
Registers
70
R0
R1
R2
R13
R14
R15
R16
R17
R26
R27
R28
R29
R30
R31
Addr.
0x00
0x01
0x02
0x0D
0x0E
0x0F
0x10
0x11
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
X-register Low Byte
X-register High Byte
Y-register Low Byte
Y-register High Byte
Z-register Low Byte
Z-register High Byte
Most of the instructions operating on the Register File have direct access to all registers, and most of them are
single cycle instructions.
As shown in Figure 4-2, each register is also assigned a data memory address, mapping them directly into the
first 32 locations of the user Data Space. Although not being physically implemented as SRAM locations, this
memory organization provides great flexibility in access of the registers, as the X-, Y-, and Z-pointer registers
can be set to index any register in the file.
4.5.1
The X-register, Y-register, and Z-register
The registers R26..R31 have some added functions to their general purpose usage. These registers are 16-bit
address pointers for indirect addressing of the data space. The three indirect address registers X, Y, and Z are
defined as described in Figure 4-3.
ATmega16U4/32U4 [DATASHEET]
Atmel-7766I-USB-ATmega16U4/32U4-Datasheet_072015
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