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P320HVN02.0 Schematic ( PDF Datasheet ) - AUO

Teilenummer P320HVN02.0
Beschreibung Color TFT-LCD
Hersteller AUO
Logo AUO Logo 




Gesamt 30 Seiten
P320HVN02.0 Datasheet, Funktion
P320HVN02.0 Product Specification
Rev.0.0
Model Name: P320HVN02.0
Issue Date : 2014/04/17
(Ϡ)Preliminary Specifications
( )Final Specifications
Customer Signature
Date AUO
Date
Approved By
Approval By PM Director
Kelly Kao
_________________________________ ____________________________________
Note
Reviewed By RD Director
Eugene CC Chen
____________________________________
Reviewed By Project Leader
Alex HM Chen
____________________________________
Prepared By PM
Bryan Chu
____________________________________
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 1 / 30






P320HVN02.0 Datasheet, Funktion
P320HVN02.0 Product Specification
Rev.0.0
3. Electrical Specification
The P320HVN01.1 requires two power inputs. One is employed to power the LCD electronics and to drive the TFT
array and liquid crystal. The other is to power Back Light Unit.
3.1 Electrical Characteristic
3.1.1: DC Characteristics
Parameter
Value
Symbol
Min. Typ.
Max
Unit Note
LCD
Power Supply Input Voltage
Power Supply Input Current
Inrush Current
Permissible Ripple of Power Supply Input Voltage
Input Differential Voltage
VDD
IDD
IRUSH
VRP
VID
10.8
--
--
--
200
12
0.39
--
--
400
13.2
0.56
5
VDD * 5%
600
VDC
A
A
mVpk-pk
mVDC
1
2
3
4
LVDS Differential Input High Threshold Voltage
Interface Differential Input Low Threshold Voltage
Input Common Mode Voltage
CMOS Input High Threshold Voltage
Interface Input Low Threshold Voltage
Backlight Power Consumption
Life time (MTTF)
VTH
VTL
VICM
VIH
(High)
VIL
(Low)
PBL
+100
-300
1.1
2.7
--
--
1.25
--
0 --
50,000
35.9
+300
-100
1.4
3.3
0.6
38.1
mVDC
mVDC
VDC
VDC
VDC
Watt
Hours
4
4
4
5
5
8,9
3.1.2: AC Characteristics
Parameter
LVDS
Interface
Receiver Clock : Spread Spectrum
Modulation range
Receiver Clock : Spread Spectrum
Modulation frequency
Receiver Data Input Margin
Fclk = 85 MHz
Fclk = 65 MHz
Value
Symbol
Min. Typ.
Max
Fclk_ss
Fclk
-3%
--
Fclk
+3%
Fss 30 -- 200
Unit Note
MHz
KHz
6
6
tRMG
-0.4
--
0.4
ns
7
-0.5 --
0.5
Note :
1. Test Condition:
(1) VDD = 12.0V
(2) Fv = 60Hz
(3) Fclk= Max freq.
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 6 / 30

6 Page









P320HVN02.0 pdf, datenblatt
3.4 Signal Timing Waveforms
P320HVN02.0 Product Specification
Rev.1.7
1 /LQH
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
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