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PDF NP3302MF01 Data sheet ( Hoja de datos )
| Número de pieza | NP3302MF01 | |
| Descripción | COLOR PLASMA DISPLAY MODULE | |
| Fabricantes | NEC | |
| Logotipo |  |
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COLOR PLASMA DISPLAY MODULE
NP3302MF01
84 cm (33 type), 640 × 480 Pixels, Digital Module
Digital RGB signal 64 gradations each
DESCRIPTION
TheNP3302MF01 is a 33-inch color plasma display module with a resolution of 640 (H) × 480 (V) pixels and
64 levels of gray scales per each RGB color. Furthermore, in order to improve the presentation of the deepest
shades of black, black stripes are laid over the ribs which separate the cells. The display offers vibrant colors we
reproduced in a thin and low profile package. This device uses AC plasma technology developed by NEC and
includes a 6-bit digital interface.
FEATURES
™ Wide viewing angle
™ 262,144 colors
™ High resolution
™ High brightness
™ Slim profile
™ Light weight
™ Active contrast adjustment with PLE function
™ Excellent contrast ratio improved by the black stripe
APPLICATIONS
™ Large Screen TV
™ Public Information Display
™ Video Conferencing Systems
™ Retail
™ Education and Training Systems
The information in this document is subject to change without notice.
Document No. EA0432EJ1V0DS00
Date Published June 1999 M
Printed in Japan
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NP3302MF01
SIGNAL FUNCTION
Symbol
R5 to R0
G5 to G0
B5 to B0
ADCK
HSYNC
VSYNC
FRAME
M2 to M0
400H
INTH
PSC3 to 0
BLKH
ALVP
HW
VW
PS3 to 0
ALARM
LVP
Table 3. Interface signal function
I/O Function
I 6-bit red video signal note 1
I 6-bit green video signal note 1
I 6-bit blue video signal note 1
(Remarks)
(R5:MSB, R0: LSB)
(G5:MSB, G0:LSB)
(B5:MSB, B0:LSB)
I Clock signal which synchronized to video signal
(positive edge)
I Horizontal synchronous signal
(negative pulse)
I Vertical synchronous signal
(negative pulse)
I Field discriminate signal
("L" in odd field)
I Video mode selection
(refer to Table 4.)
I 400-line display mode signal
("H" in 400 line mode)
I Interlace mode signal
("L" in interlace mode)
I 4-bit PLE control signal
I Video blanking and Muting note 2
(10 gradations, PSC3:MSB, PSC0:LSB)
("H" in muting)
I Stops panel driving (“O”pen or “H” in normal operation) ("L" in drive stop)
O H window display period indication signal
("H" in display period)
O V window display period indication signal
("H" in display period)
O 4-bit average brightness level signal
O Alarm signal for panel broken. note 3
O Alarm signal note 4
(10 gradations, PS3:MSB, PS0:LSB)
("H" in alarmed status)
("L" in alarmed status)
MSB : Most Significant Bit
LSB : Least Significant Bit
Notes 1. The RGB video signal should be compensated with inverse γ circuit before inputted to the color plasma
display module.
2. When BLKH input is H level, all RGB data is read as L level (black color data).
3. When ALARM output turns to H level, High voltage power input (Sustain power supply: Vs, and Data
power supply: Vd) should be switched off immediately.
When glass panel is broken, High voltage may appear at the electrode in glass cracked section and
become a cause of electric shock. Failure of internal power-source causes over-power status and gives
damage to the display panel and driver-circuits.
4. This alarm signal is output via the power supply connector.
It has the same function as ALARM except the polarity.
DATA SHEET EA0432EJ1V0DS00
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NP3302MF01
PLE (Peak Luminance Enhancement) FUNCTION
The PLE function makes it possible to increase or decrease the average brightness level of the PDP display
when the typical brightness level of the input video signal is lower or higher than the average brightness of the
previous frame. This PLE function control reduces power consumption and results in a higher contrast level.
External circuitry is required to take advantage of the PLE function.
ThePLE control circuits can be constructed by connecting external hysteresis and/or low-pass-filter circuits
between PSC3-0 (PLE control signal input) and PS3-0 (PLE control signal output).
The PLE brightness change response characteristic depends on the characteristics of the external hysteresis
and/or low-pass-filter circuit. Customers can design their favorite response characteristics by use of this external
circuit.
Video input signal
R
G
B
PLE External Circuit
Hysteresis and/or
Low-Pass-Filter function
PS3
PS2
PS1
PS0
PSC3
PSC2
PSC1
PSC0
Color plasma display
digital module
Input signal average
brightness level
calclation circuit
Display brightness level
Control circuit
Characteristic of PLE external circuit
This digital module is designed subject to use PLE func-
tion, and input signal (PSC3-PSC0) should vary linearly to
the output signal (PS3-PS0). (A short time of delayed re-
sponse is allowed).
Right figure shows the basic characteristic line for mod-
ule design and allowed characteristic area of the external
circuit.
If PLE function is not used, PSC3-PSC0 inputs should be
set to “H” level or be kept open. In this case the bright-
ness level is set to a minimum level.
PS3-PS0 output signals are refreshed in every frame.
9
8 Allowed characteristic
7 area of external circuit
6
5
4
3
2
Basic characteristic line
1
0
0123456789
PS3 to PS0
DATA SHEET EA0432EJ1V0DS00
11
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