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PDF XL24C02 Data sheet ( Hoja de datos )
| Número de pieza | XL24C02 | |
| Descripción | 2048-Bit Serial Electrically Erasable PROM | |
| Fabricantes | Exel Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de XL24C02 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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EXEL Microelectronics, Inc.
UINE
N
XL24C02
2,048-Bit Serial Electrically Erasable PROM
2.7 To 5.5 Volt Operation
FEATURES
• Low Power CMOS
— Active current less than 2mA
— Standby current less than 2µA
• Hardware Write Protection
— Write Control pin
• 2.7V to 5.5V Operation
• Extended Temperature Range: -40°C to +85°C
• Internally Organized as 256 x 8
• Two Wire Serial Interface (I2C™)
— Bidirectional data transfer protocol
• Four-Byte Page-Write Mode
— Minimizes total write time per byte
• Automatic Word Address Incrementing
— Sequential register read
• Self-Timed Write Cycle
• High Reliability
— Endurance: 100,000 erase/write cycles
— Data retention: 100 years
• 8-Pin PDIP or SOIC Packages
OVERVIEW
PIN CONFIGURATIONS
Plastic Dual-in-line
“P” Package
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 WC
6 SCL
5 SDA
JEDEC Small Outline
“Y” Package
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 WC
6 SCL
5 SDA
D0014 ILL A01.1
PIN NAMES
A0-A2
SDA
SCL
WC
VSS
VCC
Address Inputs
Serial Data I/O
Serial Clock Input
Write Control Input
Ground
Supply Voltage
The XL24C02 is a cost effective 2,048-bit serial E2PROM.
It is fabricated using EXEL’s advanced CMOS E2PROM
technology. This part operates from a single supply over
the range of 2.7 to 5.5 volts.
The XL24C02 is internally organized as a 256 x 8 memory
bank. It features a I2C serial interface and software
protocol allowing operation on a simple two-wire bus. Up
to eight XL24C02s may be connected to the 2-wire bus by
establishing their device address using the address input
pins (A0, A1 and A2).
PIN DESCRIPTIONS
Serial Data (SDA) - The SDA pin is a bidirectional pin
used to transfer data into and out of the device. Data may
change only when SCL is LOW, except START and STOP
conditions. It is an open-drain output, and may be wire-
ORed with any number of open-drain or open-collector
outputs.
Address (A0, A1 and A2) - The address inputs are used
to set the three bit device address of the XL24C02 which
will identify it on the two-wire bus. These inputs may be
tied HIGH or LOW, or they may be actively driven. These
inputs allow up to eight XL24C02 devices to be distin-
guished on the bus.
Serial Clock (SCL) - The SCL input is used to clock data
into and out of the device. In the WRITE mode, data must
remain stable when SCL is HIGH. In the READ mode,
data is clocked out on the falling edge of SCL.
Write Control (WC) - The Write Control input pin is used
to disable write circuitry to the memory. When HIGH, the
write function is disabled, protecting previously written
data; when LOW, the write function is enabled.
EXEL Microelectronics, Inc.
2150 Commerce Drive • San Jose, CA 95131
Phone 408 432-0500 • Fax 408 432-8710 • Internet www.exel.com
D0014 3/96
DVPTD 6931-05
1 page  
UINE
N
XL24C02
WRITE OPERATIONS
The XL24C02 allows two types of write operation: byte
write and page write. The byte write operation writes a
single byte during the nonvolatile write period (tWR). The
page write operation allows up to 4-byte in the same page
to be stored during tWR.
Byte WRITE
For a WRITE operation, the XL24C02 requires a word
address field after the slave address. This address field,
comprised of eight bits, with the most significant bit “don’t
care,” provides access to any one of the 256 words of
memory.
Upon receipt of the word address, the XL24C02 responds
with an ACKnowledge, and waits for the next eight bits of
data, again responding with an ACKnowledge. The mas-
ter then terminates the transfer by generating a STOP
condition, at which time the XL24C02 begins the internal
WRITE cycle to the nonvolatile array.
While the internal WRITE cycle is in progress, the XL24C02
inputs are disabled, and the device will not respond to any
requests from the master. Refer to Figure 6 for the address,
ACKnowledge, and data transfer sequence.
Page WRITE
The XL24C02 is capable of a 4-byte page-WRITE opera-
tion. It is initiated in the same manner as the byte-WRITE
operation, but instead of terminating the write cycle after
the first data word is transferred, the master can transmit
up to three more words. After the receipt of each word, the
XL24C02 will respond with an ACKnowledge.
The XL24C02 automatically increments the address for
subsequent data words. After the receipt of each word,
the two low order address bits are internally incremented
by one. The high order five bits of the address remain
constant. If the master should transmit more than four
words, prior to generating the STOP condition, the ad-
dress counter will “roll over,” and the previously written
data will be overwritten. As with the byte-WRITE opera-
tion, all inputs are disabled during the internal WRITE
cycle. Refer to Figure 6 below for the address,
ACKnowledge, and data transfer sequence.
Acknowledges Transmitted from
If single byte-WRITE only,
Stop bit issued here.
24C02 to Master Receiver
Acknowledges Transmitted from
24C02 to Master Receiver
SDA
Bus
Activity
A
A AA R C
2 10WK
A
Word Address C
K
AA
Data Byte n C Data Byte n+1 C
KK
10 10
0
AAAAAAAA
76543210
DDDDDDDD
76543210
DDDDDDDD
76543210
A2, A1, A0=
S
T
A
Device
Type
Device
Address
R
T
Address Read/Write
0= Write
X = Don't Care
A
Data Byte n+3 C
K
DDDDDDDD
76543210
S
T
O
P
Slave Address
Word Address
Master Selects
24C02 & Specifies
Write Operation
Master Transmitter
to
Slave Receiver
Master Writes Word
Address to 24C02
Master Transmitter
to
Slave Receiver
Master Writes
Data to 24C02
Master Transmitter
to
Slave Receiver
Master Writes
Data to 24C02
Master Transmitter
to
Slave Receiver
Master Writes
Data to 24C02
Master Transmitter
to
Slave Receiver
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Shading Denotes
24C02 SDA
Output Active
FIGURE 6. PAGE WRITE MODE
D0014 ILL F06.2
D0014 3/96
5 DVPTD 6931-05
5 Page 
UINE
N
XL24C02
8 Pin SOIC (Type “Y”) Package* (JEDEC 150 mil body width)
.050 (1.27) TYP.
.157 (4.00)
.150 (3.80)
.275 (6.99) TYP.
.050 (1.270) TYP.
8 Places
1 .196 (5.00)
.189 (4.80)
.061 (1.75)
.053 (1.35)
.0192 (.49)
.0138 (.35)
All dimensions in inches (mm).
* See cover page for pinout options.
.0098 (.25)
.004 (.127)
.05 (1.27) TYP.
FOOTPRINT
.030 (.762) TYP.
8 Places
.035 (.90)
.016 (.40)
.020 (.50) x45°
.010 (.25)
.244 (6.20)
.228 (5.80)
8pn JEDEC SOIC ILL.1
ORDERING INFORMATION
Prefix
XL
Part Numbers:
Part
Number
24C02
XL 24C02 P
Prefix
EXEL Product
Part Type
24C02
Package
Type
Y, P
D0014 PGM T04.1
Package Type
Y = SOIC JEDEC 150 mil
P = PDIP 300 mil
D0014 3/96
11 DVPTD 6931-05
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet XL24C02.PDF ] | |
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