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A3V28S30FTP Schematic ( PDF Datasheet ) - Zentel
| Teilenummer | A3V28S30FTP |
|
| Beschreibung | 128M Single Data Rate Synchronous DRAM | |
| Hersteller | Zentel | |
| Logo |  |
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Gesamt 30 Seiten 
A3V28S30FTP
A3V28S40FTP
128M Single Data Rate Synchronous DRAM
128Mb Synchronous DRAM Specification
A3V28S30FTP
A3V28S40FTP
Zentel Electronics Corp.
Revision 1.0
Apr., 2010
 
A3V28S30FTP
A3V28S40FTP
128M Single Data Rate Synchronous DRAM
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to Vss
Voltage on VDD supply relative to Vss
Storage temperature
Operating ambient temperature
Power dissipation
Short circuit current
Symbol
VIN,VOUT
Vdd, VddQ
TSTG
TA
PD
IOS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
-55 ~ +150
0 ~ 70
1.0
50
Unit
V
V
°C
°C
W
mA
NOTES:
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA = 0 to 70°C)
Parameter
Symbol
Min Typ
Supply voltage
Vdd
VddQ
3.0 3.3
3.0 3.3
Input logic high voltage
VIH 2.0 Vdd
Input logic low voltage
VIL -0.3 0
Output logic high voltage
VOH 2.4 -
Output logic low voltage
VOL - -
Input leakage current
IIL -10 -
Output leakage current
IOL -10 -
Max
3.6
3.6
Vdd + 0.3
0.8
-
0.4
10
10
Unit
V
V
V
V
V
V
uA
uA
Note
1
2
IOH = -0.1mA
IOL = 0.1mA
3
3
Note:
1. VIH(max) = 4.6V AC for pulse width ≤ 10ns acceptable.
2. VIL(min) = -1.5V AC for pulse width ≤ 10ns acceptable.
3. Any input 0V ≤ VIN ≤ VDD + 0.3V, all other pins are not under test = 0V.
4. Dout is disabled , 0V ≤ VOUT ≤ VDD.
CAPACITANCE ( Vdd = VddQ = 3.3V, TA = 25°C, f = 1MHz, pin under test biased at 1.4V.)
Parameter
Symbol
Min Max
Clock
Cclk
2 3.5
/CAS,/RAS,/WE,/CS,CKE,DQMU/L
Cin
2 3.5
Address
CADD
2 3.5
DQ0~DQ15
COUT
3.5 5.5
Unit
pF
pF
pF
pF
Note
Revision 1.0
Page 5 / 39
Apr., 2010
6 Page 
A3V28S30FTP
A3V28S40FTP
128M Single Data Rate Synchronous DRAM
Function Truth Table
Current state /CS /RAS
Idle H X
LH
LH
LH
LH
Row active
LL
LL
LL
LL
HX
LH
LH
Read
Write
LH
LH
LL
LL
LL
LL
HX
LH
LH
LH
LH
LL
LL
LL
LL
HX
LH
LH
LH
LH
LL
LL
LL
Read with auto
precharge
L
H
L
L
L
L
L
L
L
L
X
H
H
H
H
L
L
L
Write with auto
precharge
L
H
L
L
L
L
L
L
X
H
H
H
H
L
LL
LL
LL
/CAS
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
/WE
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
/Address
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
OC
Command
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS
DESL
NOP
BST
RD/RDA
WR/WRA
ACT
PRE/PALL
REF
MRS
Action
NOP
NOP
ILLEGAL
ILLEGAL
ILLEGAL
Bank active
NOP
Auto refresh
Mode register set
NOP
NOP
ILLEGAL
Begin read, determine AP
Begin write, determine AP
Bank active / ILLEGAL
Precharge / Precharge all banks
ILLEGAL
ILLEGAL
Continue burst to end
Continue burst to end
Terminate burst
Terminate burst, begin read, determine AP
Terminate burst, begin write, determine AP
Bank active / ILLEGAL
Terminate burst, precharge
ILLEGAL
ILLEGAL
Continue burst to end
Continue burst to end
Terminate burst
Terminate burst, begin read, determine AP
Terminate burst, begin write, determine AP
Bank active / ILLEGAL
Terminate burst, precharge
ILLEGAL
ILLEGAL
Continue burst to end
Continue burst to end
ILLEGAL
Support concurrent auto-precharge
Support concurrent auto-precharge
Bank active / ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Continue burst to end
Continue burst to end
ILLEGAL
Support concurrent auto-precharge
Support concurrent auto-precharge
Bank active / ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Notes
2
2
2
4
5
5
2
2
3
3
2
3
3
2
2
2
2
2
2
2
2
2
Revision 1.0
Page 11 / 39
Apr., 2010
12 Page | ||
| Seiten | Gesamt 30 Seiten | |
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