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Teilenummer | TFTMD80120CBB |
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Beschreibung | WXGA Super-TFT Module | |
Hersteller | Hitachi | |
Logo | ![]() |
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Gesamt 22 Seiten ![]() Global LCD Panel Exchange Center
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Hitachi Displays, Ltd.
DATE : Nov. 10, 2003
Technical Sheets of 32 cm diagonal WXGA Super-TFT Module
Product Name : TFTMD80120CBB
CONTENTS
No. Item
- COVER
- RECORD OF REVISION
- DESCRIPTION
1 ABSOLUTE MAXIMUM RATINGS
2 OPTICAL CHARACTERISTICS
3 ELECTRICAL CHARACTERISTICS
4 BLOCK DIAGRAM
5 INTERFACE PIN CONNECTION
6 INTERFACE TIMING
7 DIMENSIONAL OUTLINE
8 DESIGNATION OF LOTMARK
9 PRECAUTION
Sheet No.
3284STD-2188-1
3284STD-2188-1
3284STD-2188-1
3284STD-2188-1
3284STD-2188-1
3284STD-2188-1
3284STD-2188-1
3284STD-2188-1
3284STD-2188-1
3284STD-2188-1
3284STD-2188-1
Page
1-1/1
2-1/1
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4-1/1
5-1/2 - 2/2
6-1/1
7-1/1
8-1/6 - 6/6
9-1/3-3/3
10 -1/2-2/2
11-1/1
12-1/3-3/3
The information described in this technical specification is tentative and it is possible to be changed without prior notice.
Hitachi Displays, Ltd.
Sheet
No.
3284STD-2188-1
Page 1-1/1
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Note 1) Definition of Viewing Angle
=90 °
12 o'clock Y
=0 °
Z
eye
=180° X'
9 o'clock
=0 °
X 3 o'clock
Super-TFT Module
Z'
2) Definition of Contrast Ratio (CR)
(Luminance at displaying WHITE)
= (Luminance at displaying BLACK)
3) Definition of Response Time
Y' =270°
6 o'clock
Displaying
Data Signal
BLACK
WHITE
BLACK
ton toff
Optical
Response
%
100
90
( Luminance) 10
0
4 Definition of Brightness Uniformity
Display pattern is white (255 level) . The brightness
10%
90%
(1) (2) (3) 50%
(4) (5) (6)
(7) (8) (9)
10% 50%
90%
measuring points
uniformity is defined as the following equation. Brightness at each
point is measured, and average, maximum and minimum
brightness is calculated.
Buni=
Bmax or Bmin Bave
Bave
where, Bmax = Maximum brightness
Bmin = Minimum brightness
Bave= Average brightness =
9
(B(k))
k=1
5 Variation of color position on CIE is defined as difference between colors at =0 and
at 50°& =0°,90°,180°,270°.
Hitachi Displays, Ltd.
Date Nov.10,2003 Sheet
No.
3284STD-2188-1
Page
5-2/2
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CORRESPONDENCE BETWEEN INPUT DATA AND DISPLAY IMAGE
Display data of adjacent one pixel is latched during one cycle of DCLK.
ʢøɼøʣ
ęĎ ĉ
pixel
R0 R7 :R data
G0 G7 :G data
B0 B7 :B data
Hitachi Displays, Ltd.
Date Nov.10,2003 Sheet
No.
3284STD-2188-1
Page 8-4/5
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12 Page | ||
Seiten | Gesamt 22 Seiten | |
PDF Download | [ TFTMD80120CBB Schematic.PDF ] |
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