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Teilenummer | V400HK3-PE1 |
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Beschreibung | TFT LCD Module | |
Hersteller | CMI MEI | |
Logo | ||
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PRODUCT SPECIFICATION
ϭ Tentative Specification
ϭ Preliminary Specification
Ϯ Approval Specification
MODEL NO.: V400HK3
SUFFIX: PE1
Customer: SEC
APPROVED BY
Name / Title
Note
SIGNATURE
Please return 1 copy for your confirmation with your
signature and comments.
Approved By
Checked By Prepared By
Chao-Chun Chung Josh Chi Joanne Chung
Version 2.0
1 DateΚ7 Dec. 2010
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
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PRODUCT SPECIFICATION
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item
Symbol
Value
Min. Max.
Unit Note
Storage Temperature
TST -20
+60 ºC (1)
Operating Ambient Temperature
TOP
0
50 ºC (1), (2)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 65 ºC. The range of operating temperature may degrade in case of
improper thermal management in final product design.
Version 2.0
6 DateΚ7 Dec. 2010
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
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PRODUCT SPECIFICATION
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD Module Input
CNF1 Connector Pin Assignment (FP7S082HA1R1200,JAE Taiwan(़ሽ) or equivalent)
Pin Name
Description
Note
1 VCC
+12V power supply
2 VCC
+12V power supply
3 VCC
+12V power supply
4 VCC
+12V power supply
5 VCC
+12V power supply
6 N.C.
No Connection
(1)
7 GND
Ground
8 GND
Ground
9 GND
Ground
10 CH1[0]-
First pixel Negative LVDS differential data input. Pair 0
11 CH1[0]+
First pixel Positive LVDS differential data input. Pair 0
12 CH1[1]-
First pixel Negative LVDS differential data input. Pair 1
13 CH1[1]+
First pixel Positive LVDS differential data input. Pair 1
14 CH1[2]-
First pixel Negative LVDS differential data input. Pair 2
15 CH1[2]+
First pixel Positive LVDS differential data input. Pair 2
16 GND
Ground
17 CH1CLK-
First pixel Negative LVDS differential clock input.
18 CH1CLK+ First pixel Positive LVDS differential clock input.
19 GND
Ground
20 CH1[3]-
First pixel Negative LVDS differential data input. Pair 3
21 CH1[3]+
First pixel Positive LVDS differential data input. Pair 3
22 CH1[4]-
First pixel Negative LVDS differential data input. Pair 4
23 CH1[4]+
First pixel Positive LVDS differential data input. Pair 4
24 GND
Ground
25 CH3[0]-
Third pixel Negative LVDS differential data input. Pair 0
26 CH3[0]+
Third pixel Positive LVDS differential data input. Pair 0
27 CH3[1]-
Third pixel Negative LVDS differential data input. Pair 1
28 CH3[1]+
Third pixel Positive LVDS differential data input. Pair 1
Version 2.0
12 DateΚ7 Dec. 2010
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ V400HK3-PE1 Schematic.PDF ] |
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