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PDF NB3L553 Data sheet ( Hoja de datos )
| Número de pieza | NB3L553 | |
| Descripción | 2.5V / 3.3V / 5.0V 1:4 Clock Fanout Buffer | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NB3L553
2.5 V / 3.3 V / 5.0 V
1:4 Clock Fanout Buffer
Description
The NB3L553 is a low skew 1−to 4 clock fanout buffer, designed for
clock distribution in mind. The NB3L553 specifically guarantees low
output−to−output skew. Optimal design, layout and processing
minimize skew within a device and from device to device.
The output enable (OE) pin tri−states the outputs when low.
Features
• Input/Output Clock Frequency up to 200 MHz
• Low Skew Outputs (35 ps)
• Output Enable Mode Three−States Outputs
• Operating Range: VDD = 2.375 V to 5.25 V
• Ideal for Networking Clocks
• Packaged in 8−pin SOIC
• Industrial Temperature Range
• These are Pb−Free Devices
http://onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
8
3L553
ALYW
G
1
3N553 = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
Q1
Q2
CLK
Q3
Q4
OE
Figure 1. Block Diagram
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 0
1
DFN8
MN SUFFIX
CASE 506AA
14
XX = Specific Device Code
M = Date Code
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
PINOUT
VDD
Q0
Q1
GND
1
2
3
4
8
OE
7
Q3
6
Q2
5
ICLK
ORDERING INFORMATION
Device
Package
Shipping†
NB3L553DG
NB3L553DR2G
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
98 Units/Rail
2500/Tape & Reel
NB3L553MNR4G* DFN−8 1000/Tape & Reel
(Pb−Free)
*Contact Sales Representative
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1 Publication Order Number:
NB3L553/D
1 page  
NB3L553
−X−
A
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AG
B
−Y−
−Z−
H
85
S 0.25 (0.010) M Y M
1
4
K
G
D
C
SEATING
PLANE
N X 45 _
0.10 (0.004)
M
0.25 (0.010) M Z Y S X S
J
SOLDERING FOOTPRINT*
1.52
0.060
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0_ 8_ 0_ 8_
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
ǒ ǓSCALE 6:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NB3L553.PDF ] | |
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