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L6207 Schematic ( PDF Datasheet ) - STMicroelectronics

Teilenummer L6207
Beschreibung DMOS DUAL FULL BRIDGE DRIVER WITH PWM CURRENT CONTROLLER
Hersteller STMicroelectronics
Logo STMicroelectronics Logo 




Gesamt 23 Seiten
L6207 Datasheet, Funktion
L6207
DMOS DUAL FULL BRIDGE DRIVER
WITH PWM CURRENT CONTROLLER
s OPERATING SUPPLY VOLTAGE FROM 8 TO 52V
s 5.6A OUTPUT PEAK CURRENT (2.8A DC)
s RDS(ON) 0.3TYP. VALUE @ Tj = 25 °C
s OPERATING FREQUENCY UP TO 100KHz
s NON DISSIPATIVE OVERCURRENT
PROTECTION
s DUAL INDEPENDENT CONSTANT tOFF PWM
CURRENT CONTROLLERS
s SLOW DECAY SYNCHRONOUS
RECTIFICATION
s CROSS CONDUCTION PROTECTION
s THERMAL SHUTDOWN
s UNDER VOLTAGE LOCKOUT
s INTEGRATED FAST FREE WHEELING DIODES
TYPICAL APPLICATIONS
s BIPOLAR STEPPER MOTOR
s DUAL DC MOTOR
DESCRIPTION
The L6207 is a DMOS Dual Full Bridge designed for
motor control applications, realized in MultiPower-
BLOCK DIAGRAM
PowerDIP24
(20+2+2)
PowerSO36
SO24
(20+2+2)
ORDERING NUMBERS:
L6207N (PowerDIP24)
L6207PD (PowerSO36)
L6207D (SO24)
BCD technology, which combines isolated DMOS
Power Transistors with CMOS and bipolar circuits on
the same chip. The device also includes two inde-
pendent constant off time PWM Current Controllers
that performs the chopping regulation. Available in
PowerDIP24 (20+2+2), PowerSO36 and SO24
(20+2+2) packages, the L6207 features a non-dissi-
pative overcurrent protection on the high side Power
MOSFETs and thermal shutdown.
VBOOT
VCP
VBOOT
CHARGE
PUMP
OCDA
ENA
IN1A
IN2A
THERMAL
PROTECTION
VOLTAGE
REGULATOR
10V 5V
ENB
IN1B
IN2B
September 2003
OCDB
VBOOT
VBOOT
VSA
OVER
CURRENT
DETECTION
GATE
LOGIC
10V
ONE SHOT
MONOSTABLE
OVER
CURRENT
DETECTION
GATE
LOGIC
10V
PWM
MASKING
TIME
+
SENSE
-
COMPARATOR
BRIDGE A
BRIDGE B
D99IN1085A
OUT1A
OUT2A
SENSEA
VREFA
RCA
VSB
OUT1B
OUT2B
SENSEB
VREFB
RCB
1/23






L6207 Datasheet, Funktion
L6207
ELECTRICAL CHARACTERISTICS (continued)
(Tamb = 25 °C, Vs = 48V, unless otherwise specified)
Symbol
Parameter
Test Conditions
Switching Characteristics
tD(on)EN Enable to out turn ON delay time (8) ILOAD =2.8A, Resistive Load
tD(on)IN Input to out turn ON delay time ILOAD =2.8A, Resistive Load
(dead time included)
tRISE Output rise time(8)
ILOAD =2.8A, Resistive Load
tD(off)EN Enable to out turn OFF delay time (8) ILOAD =2.8A, Resistive Load
tD(off)IN Input to out turn OFF delay time ILOAD =2.8A, Resistive Load
tFALL Output Fall Time (8)
ILOAD =2.8A, Resistive Load
tdt Dead Time Protection
fCP Charge pump frequency
-25°C<Tj <125°C
Min Typ Max Unit
100 250 400
1.6
ns
µs
40 250 ns
300 550 800
ns
600 ns
40 250 ns
0.5 1
0.6
µs
1 MHz
PWM Comparator and Monostable
IRCA, IRCB Source Current at pins RCA and VRCA = VRCB = 2.5V
RCB
3.5 5.5
mA
Voffset Offset Voltage on Sense
Comparator
VREFA, VREFB = 0.5V
±5 mV
tPROP Turn OFF Propagation Delay (9)
500 ns
tBLANK Internal Blanking Time on
SENSE pins
1 µs
tON(MIN) Minimum On Time
1.5 2 µs
tOFF PWM Recirculation Time
ROFF = 20KΩ; COFF = 1nF
13 µs
ROFF = 100KΩ; COFF = 1nF
61 µs
IBIAS Input Bias Current at pins VREFA
and VREFB
10 µA
Over Current Protection
ISOVER Input Supply Overcurrent
Protection Threshold
Tj = -25°C to 125°C (7)
4 5.6 7.1 A
ROPDR Open Drain ON Resistance
I = 4mA
40 60
tOCD(ON) OCD Turn-on Delay Time (10) I = 4mA; CEN < 100pF
200 ns
tOCD(OFF) OCD Turn-off Delay Time (10) I = 4mA; CEN < 100pF
(7) Tested at 25°C in a restricted range and guaranteed by characterization.
(8) See Fig. 1.
(9) Measured applying a voltage of 1V to pin SENSE and a voltage drop from 2V to 0V to pin VREF.
(10) See Fig. 2.
100
ns
6/23

6 Page









L6207 pdf, datenblatt
L6207
Figure 10. Area where tON can vary maintaining the PWM regulation.
100
10
1.5µs (typ. value)
1
0.1 1
10 100
Coff [nF]
SLOW DECAY MODE
Figure 11 shows the operation of the bridge in the Slow Decay mode. At the start of the off time, the lower power
MOS is switched off and the current recirculates around the upper half of the bridge. Since the voltage across
the coil is low, the current decays slowly. After the dead time the upper power MOS is operated in the synchro-
nous rectification mode. When the monostable times out, the lower power MOS is turned on again after some
delay set by the dead time to prevent cross conduction.
Figure 11. Slow Decay Mode Output Stage Configurations
A) ON TIME
D01IN1336
B) 1µs DEAD TIME
C) SYNCHRONOUS
RECTIFICATION
D) 1µs DEAD TIME
12/23

12 Page





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