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XQ7VX690T Schematic ( PDF Datasheet ) - Xilinx

Teilenummer XQ7VX690T
Beschreibung Virtex-7 T and XT FPGAs
Hersteller Xilinx
Logo Xilinx Logo 




Gesamt 30 Seiten
XQ7VX690T Datasheet, Funktion
DS183 (v1.21) July 1, 2014
Virtex-7 T and XT FPGAs Data Sheet:
DC and AC Switching Characteristics
Product Specification
Introduction
Virtex®-7 T and XT FPGAs are available in -3, -2, -1, and
-2L speed grades, with -3 having the highest performance.
The -2L devices operate at VCCINT = 1.0V and are screened
for lower maximum static power. The speed specification of
a -2L device is the same as the -2 speed grade. The -2G
speed grade is available in devices utilizing Stacked Silicon
Interconnect (SSI) technology. The -2G speed grade
supports 12.5 Gb/s GTX or 13.1 Gb/s GTH transceivers as
well as the standard -2 speed grade specifications.
Virtex-7 T and XT FPGA DC and AC characteristics are
specified in commercial, extended, industrial, and military
temperature ranges. Except for the operating temperature
range or unless otherwise noted, all the DC and AC
electrical parameters are the same for a particular speed
grade (that is, the timing characteristics of a -1M speed
grade military device are the same as for a -1C speed grade
commercial device). However, only selected speed grades
and/or devices are available in each temperature range.
All supply voltage and junction temperature specifications
are representative of worst-case conditions. The
parameters included are common to popular designs and
typical applications.
Available device and package combinations can be found in:
7 Series FPGAs Overview (DS180)
Defense-Grade 7 Series FPGAs Overview (DS185)
This Virtex-7 T and XT FPGA data sheet, part of an overall
set of documentation on the 7 series FPGAs, is available on
the Xilinx website at www.xilinx.com/7.
DC Characteristics
Table 1: Absolute Maximum Ratings(1)
Symbol
Description
FPGA Logic
VCCINT
VCCAUX
VCCBRAM
VCCO
Internal supply voltage
Auxiliary supply voltage
Supply voltage for the block RAM memories
Output drivers supply voltage for 3.3V HR I/O banks
Output drivers supply voltage for 1.8V HP I/O banks
VCCAUX_IO
VREF
Auxiliary supply voltage
Input reference voltage
I/O input voltage for 3.3V HR I/O banks
VIN(2)(3)(4)
I/O input voltage for 1.8V HP I/O banks
I/O input voltage (when VCCO = 3.3V) for VREF and differential I/O standards except
TMDS_33(5)
VCCBATT
Key memory battery backup supply
GTX and GTH Transceivers
VMGTAVCC
VMGTAVTT
VMGTVCCAUX
VMGTREFCLK
Analog supply voltage for the GTX/GTH transmitter and receiver circuits
Analog supply voltage for the GTX/GTH transmitter and receiver termination circuits
Auxiliary analog Quad PLL (QPLL) voltage supply for the GTX/GTH transceivers
GTX/GTH transceiver reference clock absolute input voltage
Min Max Units
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.40
–0.55
–0.40
1.1
2.0
1.1
3.6
2.0
2.06
2.0
VCCO + 0.55
VCCO + 0.55
2.625
V
V
V
V
V
V
V
V
V
V
–0.5 2.0
V
–0.5 1.1
–0.5 1.32
–0.5 1.935
–0.5 1.32
V
V
V
V
© 2011–2014 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Kintex, Artix, Zynq, Spartan, ISE, Vivado and other designated brands included herein are trademarks of Xilinx in the
United States and other countries. All other trademarks are the property of their respective owners.
DS183 (v1.21) July 1, 2014
Product Specification
www.xilinx.com
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XQ7VX690T Datasheet, Funktion
Virtex-7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics
Table 6: Typical Quiescent Supply Current (Cont’d)
Symbol
Description
Device
ICCOQ
ICCAUXQ
Quiescent VCCO supply current
Quiescent VCCAUX supply current
XC7V585T
XC7V2000T
XC7VX330T
XC7VX415T
XC7VX485T
XC7VX550T
XC7VX690T
XC7VX980T
XC7VX1140T
XQ7V585T
XQ7VX330T
XQ7VX485T
XQ7VX690T
XQ7VX980T
XC7V585T
XC7V2000T
XC7VX330T
XC7VX415T
XC7VX485T
XC7VX550T
XC7VX690T
XC7VX980T
XC7VX1140T
XQ7V585T
XQ7VX330T
XQ7VX485T
XQ7VX690T
XQ7VX980T
Speed Grade
-3 -2G -2 -2L
-1
1111 1
N/A 1
11
1
1111 1
1111 1
1111 1
1111 1
1111 1
N/A 1 1 1
1
N/A 1
11
1
N/A N/A
1
1
1
N/A N/A
1
1
1
N/A N/A
1
1
1
N/A N/A
1 N/A
1
N/A N/A N/A
1
1
114 114 114 114 114
N/A 315 315 315 315
73 73 73 73 73
88 88 88 88 88
104 104 104 104 104
147 147 147 147 147
147 147 147 147 147
N/A 183 183 183 183
N/A 250 250 250 250
N/A N/A 114 114 114
N/A N/A
73
73
73
N/A N/A 104 104 104
N/A N/A 147 N/A 147
N/A N/A N/A 183 183
Units
-1M
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
1 mA
1 mA
1 mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
114 mA
73 mA
104 mA
N/A mA
N/A mA
DS183 (v1.21) July 1, 2014
Product Specification
www.xilinx.com
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XQ7VX690T pdf, datenblatt
Virtex-7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics
LVDS DC Specifications (LVDS_25)
The LVDS standard is available in the HR I/O banks.
Table 12: LVDS_25 DC Specifications(1)
Symbol
DC Parameter
Conditions
Min Typ Max Units
VCCO
VOH
VOL
VODIFF
Supply voltage
Output High voltage for Q and Q
Output Low voltage for Q and Q
Differential output voltage
(Q – Q), Q = High
(Q – Q), Q = High
RT = 100 Ω across Q and Q signals
RT = 100 Ω across Q and Q signals
RT = 100 Ω across Q and Q signals
2.375
0.700
247
2.500
350
2.625
1.675
600
V
V
V
mV
VOCM
VIDIFF
Output common-mode voltage
Differential input voltage
(Q – Q), Q = High
(Q – Q), Q = High
RT = 100 Ω across Q and Q signals
1.000
100
1.250
350
1.425
600
V
mV
VICM
Input common-mode voltage
0.300 1.200 1.425
V
Notes:
1. Differential inputs for LVDS_25 can be placed in banks with VCCO levels that are different from the required level for outputs. Consult the
7 Series FPGAs SelectIO Resources User Guide (UG471) for more information.
LVDS DC Specifications (LVDS)
The LVDS standard is available in the HP I/O banks.
Table 13: LVDS DC Specifications
Symbol
DC Parameter
Conditions
Min Typ Max Units
VCCO
VOH
VOL
VODIFF
Supply voltage
Output High voltage for Q and Q
Output Low voltage for Q and Q
Differential output voltage
(Q – Q), Q = High
(Q – Q), Q = High
RT = 100 Ω across Q and Q signals
RT = 100 Ω across Q and Q signals
RT = 100 Ω across Q and Q signals
1.710
0.825
247
1.800
350
1.890
1.675
600
V
V
V
mV
VOCM
VIDIFF
Output common-mode voltage
Differential input voltage
(Q – Q), Q = High
(Q – Q), Q = High
RT = 100 Ω across Q and Q signals
Common-mode input voltage = 1.25V
1.000
100
1.250
350
1.425
600
V
mV
VICM
Input common-mode voltage
Differential input voltage = ±350 mV
0.300 1.200 1.425
V
Notes:
1. Differential inputs for LVDS can be placed in banks with VCCO levels that are different from the required level for outputs. Consult the 7 Series
FPGAs SelectIO Resources User Guide (UG471) for more information.
DS183 (v1.21) July 1, 2014
Product Specification
www.xilinx.com
Send Feedback
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