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PDF N121I6-L02 Data sheet ( Hoja de datos )
| Número de pieza | N121I6-L02 | |
| Descripción | TFT LCD Module | |
| Fabricantes | CMI MEI | |
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- CONTENTS -
Doc No.: 14077242
Issued Date:Jul. 20, 2007
Model No.: N121I6 -L02
Preliminary
REVISION HISTORY
1. GENERAL DESCRIPTION
1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
5.2 TIMING DIAGRAM OF LVDS INPUT SIGNAL
5.3 COLOR DATA INPUT ASSIGNMENT
5.4 EDID DATA STRUCTURE
5.5 EDID SIGNAL SPECIFICATION
6. CONVERTER SPECIFICATION
6.1 CONNECTOR TYPE
6.2 INPUT CONNECTOR PIN ASSIGNMENT
7. INTERFACE TIMING
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
7.2 POWER ON/OFF SEQUENCE
8. OPTICAL CHARACTERISTICS
8.1 TEST CONDITIONS
8.2 OPTICAL SPECIFICATIONS
9. PRECAUTIONS
9.1 HANDLING PRECAUTIONS
9.2 STORAGE PRECAUTIONS
9.3 OPERATION PRECAUTIONS
10. PACKING
10.1 CARTON
10.2 PALLET FOR SEA FREIGHT
10.3 PALLET FOR AIR FREIGHT
11. DEFINITION OF LABELS
11.1 CMO MODULE LABELL
11.2 CARTON LABEL
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2 / 30
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Doc No.: 14077242
Issued Date:Jul. 20, 2007
Model No.: N121I6 -L02
Preliminary
Note (3)The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.
a. White Pattern
b. Black Pattern
Active Area
Active Area
Note (4) The specified power are the sum of LCD panel electronics input power and the converter input
power. Test conditions are as follows.
(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60 Hz,
(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file
“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.
(c) Luminance: 60 nits.
(d) The converter used is provided from Sumida(CMO converter P/N:27-D016392).
Note (5)
The parameters of LVDS signals are defined as the following figures.
Single Ended
VCM
|VID|
0V
Differential
VTH(LVDS)
0V
VTL(LVDS)
|VID|
8 / 30
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet N121I6-L02.PDF ] | |
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