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PDF T645HW04-V0 Data sheet ( Hoja de datos )

Número de pieza T645HW04-V0
Descripción TFT LCD Module
Fabricantes AUO 
Logotipo AUO Logotipo



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T645HW04 V0 Product Specification
Rev. 1.0
Model Name: T645HW04 V0
Issue Date : 2010/5/20
( )Preliminary Specifications
()Final Specifications
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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T645HW04-V0 pdf
2. Absolute Maximum Ratings
T645HW04 V0 Product Specification
Rev. 1.0
The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit
Item
Logic/LCD Drive Voltage
Input Voltage of Signal
Operating Temperature
Operating Humidity
Storage Temperature
Storage Humidity
Panel Surface Temperature
Symbol
VDD
Vin
TOP
HOP
TST
HST
PST
Min
-0.3
-0.3
0
10
-20
10
-
Max
14
4
+50
90
+60
90
65
Unit
[Volt]
[Volt]
[oC]
[%RH]
[oC]
[%RH]
[oC]
Conditions
Note 1
Note 1
Note 2
Note 2
Note 2,4
Note 2,4
Note 3
Note 1: Duration:50 msec.
Note 2 : Maximum Wet-Bulb should be 39 and No condensation.
The relative humidity must not exceed 90% non-condensing at temperatures of 40 or less. At temperatures
℃ ℃greater than 40 , the wet bulb temperature must not exceed 39 .
Note 3: Surface temperature is measured at 50 Dry condition
Note 4: Storage period should refer to RA criteria
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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T645HW04-V0 arduino
3.3 Signal Timing Specification
T645HW04 V0 Product Specification
Rev. 1.1
This is the signal timing required at the input of the user connector. All of the interface signal timing should be
satisfied with the following specifications for its proper operation.
Signal
Vertical Section
Horizontal Section
Clock
Vertical Frequency
Horizontal Frequency
Item
Period
Active
Front Porch
Sync Width
Back Porch
Period
Active
Front Porch
Sync Width
Back Porch
Frequency
Frequency
Frequency
Min. Typ. Max Unit
1110
Th
1080
Th
21 Th
4 Th
5 Th
2140
Tclk
1920
Tclk
26 Th
44 Th
150 Tclk
142.524
MHz
60 Hz
66.6 KHz
Notes:
(1) Display position is specific by the rise of DE signal only.
Horizontal display position is specified by the rising edge of 1st DCLK after the rise of 1st DE, is displayed on the
left edge of the screen.
(2) Vertical display position is specified by the rise of DE after a “Low” level period equivalent to eight times of
horizontal period. The 1st data corresponding to one horizontal line after the rise of 1st DE is displayed at the top
line of screen.
(3) If a period of DE “High” is less than 1920 DCLK or less than1080 lines, the rest of the screen displays black.
(4) The display position does not fit to the screen if a period of DE “High” and the effective data period do not
synchronize with each other.
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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